Prime ASIC Verification Engineer
ActalentJob Title
Prime ASIC Verification Engineer
Role Summary
Actalent is hiring a digital verification engineer to develop and execute verification strategies for ASIC functional blocks, cores, and subsystems. The role focuses on simulation, formal methods, and coverage-driven verification to validate RTL against system requirements.
Experience Level
Mid-level. Specific years of experience not provided.
Responsibilities
The engineer will own verification activities for assigned blocks and collaborate with cross-functional teams.
- Design and implement verification strategies for functional blocks, cores, and subsystems.
- Develop UVM-based testbenches and SystemVerilog test components.
- Write and maintain assertions using SVA and apply formal verification where appropriate.
- Drive coverage-driven verification and closure activities.
- Automate regressions and verification flows using scripting and build tools.
- Debug failures, perform root-cause analysis, and work with RTL and system engineers to resolve issues.
Requirements
Must-have technical skills and tools required for the role.
- Strong SystemVerilog and UVM experience.
- Proficient with SVA (SystemVerilog Assertions) and assertion-based verification.
- Experience with simulation, formal methods, and coverage-driven techniques.
- Strong programming/scripting skills: Python, C/C++, Make, Bash.
- Experience debugging RTL and verification environments; ability to collaborate with systems and RTL engineers.
Education Requirements
Not specified.
About the Company
Company: Actalent
Actalent is a global engineering and sciences services and talent solutions firm that connects specialized consultants with companies to accelerate product development and scale operations. With a network of nearly 30,000 consultants and thousands of clients across North America, Asia and Europe, Actalent serves industries including aerospace, medical devices, energy and technology.
