Pre-Silicon Signoff Lead
SynopsysJob Title
Pre-Silicon Signoff Lead
Role Summary
Lead pre-silicon simulation, verification, and sign-off activities for high-speed SerDes/connectivity IP. Work cross-functionally with analog, digital, firmware, and hardware teams to define and execute verification plans, metrics, and sign-off deliverables.
This role focuses on ensuring reliability and performance for PCIe and Ethernet IP across modeling, verification flows, and hardware regression efforts.
Experience Level
Senior - 10+ years of relevant industry experience.
Responsibilities
Primary responsibilities include planning and executing verification and sign-off for connectivity IP and coordinating across teams.
- Develop and maintain simulation and verification plans for IP to meet reliability and performance targets.
- Coordinate and review verification execution across analog, cosim, digital verification, GLS, formal, and emulation teams.
- Establish, monitor, and report verification metrics (functional, code, assertion coverage) and drive coverage closure.
- Coordinate hardware regression plans with firmware and digital firmware developers across FW releases.
- Produce verification collateral: test plans, test cases, coverage reports, and sign-off documentation.
- Provide technical leadership and mentoring for verification engineers; drive testbench architecture and planning.
- Support customers and hardware teams with troubleshooting and validation during pre-silicon stages.
Requirements
Must-have technical skills and experience for day-one contribution.
- Deep protocol and design expertise in high-speed connectivity, specifically PCIe and Ethernet.
- Proficiency in SystemVerilog, object-oriented verification, and UVM/VMM/OVM methodologies.
- Experience with assertion-based verification and coverage-driven verification (coverage closure).
- Strong scripting and programming skills: Python, TCL, Perl, and C/C++.
- In-depth knowledge of high-speed analog and digital design principles and SerDes modeling.
- Familiarity with mixed verification flows: analog, cosimulation, digital verification, gate-level simulation (GLS), formal verification, and emulation.
- Proven leadership in testbench architecture, verification planning, cross-site collaboration, and mentoring junior engineers.
Education Requirements
MSc or PhD in Electrical or Computer Engineering (explicitly listed). 10+ years of industry experience is specified but is separate from degree requirement.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
