Power Validation Engineer

Job Title

Power Validation Engineer

Role Summary

Own end-to-end power characterization and validation for Etched's ASICs and mezzanine card platform from early silicon bring-up through production qualification. Work across hardware, firmware, and system teams to translate measurements into design and validation decisions.

Experience Level

Mid-level (no explicit years of experience stated).

Responsibilities

Execute electrical and system-level validation activities to quantify power behavior, identify risks, and close issues with design teams.

• Design and run power measurement campaigns across all rails (VDD_CORE, HBM, PCIe, AUX, etc.) under representative LLM inference and stress workloads; quantify peak, sustained, and idle envelopes across PVT corners.
• Validate PDN performance (VRM load-step response, PDN impedance, PCIe power compliance) and provide actionable feedback on decoupling, plane geometry, and capacitor placement.
• Profile power transients (ramp rates, droop, recovery) and correlate them with on-die performance monitors and multi-channel captures.
• Run extended stress tests (72+ hours) to reveal reliability and throttling behavior; instrument multi-zone thermal profiles and support SLT and production debugging.
• Validate power sequencing, PMBus telemetry, and BMC alert thresholds across cold-start, restart, and fault-injection scenarios; own power-related pass/fail criteria for qualification stages.
• Feed characterization results to RTL, physical design, and firmware teams to inform DVFS policy, clock gating, leakage optimization, and PDN changes.
• Develop automated test procedures and data pipelines for long-running and reproducible power validation campaigns.
• Investigate failures to root cause at the hardware interface or component level and support component validation and failure analysis.
• Collaborate with hardware designers and diagnostics teams to ensure testability and debug support for new architectures.

Requirements

Core technical skills and hands-on bench experience required for independent power validation work.

Must-have:

• Deep understanding of ASIC and system-level power delivery: VRM topology, PDN impedance, decoupling strategy, and transient response.
• Hands-on bench experience with precision shunts, isolated differential probes, and VNA-based PDN impedance measurement.
• Experience with multi-phase, high-dynamic solutions and VR tuning to meet CPU/ASIC power specifications.
• Strong oscilloscope and lab-instrument fluency, including triggering on rare transients and correlating multi-channel captures.
• Demonstrated ability to design experiments that isolate root causes in complex hardware–software stacks and turn findings into actionable fixes.
• Relevant experience with silicon bring-ups and system-level validation.

Nice-to-have:

• Experience with high-voltage testing (800 V and higher).
• Prior power validation on AI accelerators, GPUs, or high-performance server platforms, including HBM power characterization.
• Familiarity with OpenBMC/IPMI or custom BMC firmware and PMBus sensor/debug flows.
• Familiarity with LLM inference stacks sufficient to construct representative power workloads.
• Proficiency in Python for test automation, data pipelines, and statistical analysis; experience debugging across PMBus/BMC logs to firmware and kernel traces.

Education Requirements

Bachelor's degree in Electrical Engineering or a related field is required. Advanced degrees or certifications in power electronics (for example, a Master's in Power Electronics) are a plus.

About the Company

Company: Etched

Headquarters: San Jose, CA, United States

Etched develops purpose-built AI inference ASICs and systems optimized for transformer models, aiming to deliver significantly higher performance, lower cost, and lower latency than GPUs. The company focuses on enabling applications like real-time video generation and advanced reasoning agents, and is backed by leading investors and engineers.