Power Model Engineer
SiFiveJob Title
Power Model Engineer
Role Summary
Develop and validate power models for RISC-V processors to support architecture exploration and implementation. Collaborate with architecture, RTL, and silicon teams to correlate predictions with real designs and improve power estimation methods.
Experience Level
Mid-level — requires 3+ years of relevant experience in power analysis and modeling.
Responsibilities
Typical responsibilities include:
- Develop power models for architecture exploration and design trade-offs.
- Correlate power models against RTL simulations and silicon measurements.
- Predict power impact of architecture and microarchitecture changes.
- Integrate power modeling into design and verification flows.
- Maintain and refactor large modeling codebases and tooling.
Requirements
Must-have skills and experience:
- 3+ years of experience in power analysis and modeling.
- Experience assessing power impacts at architecture, logic, and circuit levels.
- Strong knowledge of high-performance out-of-order CPU architecture.
- Experience with ASIC power analysis and optimization flows.
- Competency in software engineering best practices for large object-oriented codebases.
- Hands-on expertise in either hardware (RTL/implementation/verification/backend/FPGA) or software development is a strong plus.
- Self-starter, fast learner, and strong problem-solving skills.
Education Requirements
MS or PhD in Computer Science or Computer Architecture.
About the Company
Company: SiFive
Headquarters: San Mateo, California, United States
SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.
