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Power Integrity Design Engineer – PDN/EMIR

Qualcomm
September 04, 2026
Full-time
On-site
Cork, Ireland
Physical Design Jobs, Level - Mid-Career

Job Title

Power Integrity Design Engineer – PDN/EMIR

Role Summary

As a PDN/EMIR Engineer on the PDN team you will perform power integrity analyses (IR-drop, electromigration) for block- and chip-level SoCs, collaborate with Physical Design, STA and implementation teams, and drive PDN closure and sign-off for high-performance, low-power ASICs.

Experience Level

Mid-level. The posting requests 3+ years of related work experience; specific minimums vary by degree (see Education Requirements).

Responsibilities

Primary responsibilities include power integrity signoff, methodology development and cross-functional collaboration.

  • Perform PDN checks (IR-drop, ESD, electromigration) for complex cores and full-chip SoCs.
  • Develop and improve PDN/EMIR analysis techniques, methodologies and signoff flows.
  • Analyze PD gate netlists and select use-cases for power-integrity signoff with design teams.
  • Work with Physical Design and STA teams for Vmin assessment and optimization.
  • Ensure compliance with power integrity signoff criteria and checklists.
  • Automate power and PDN data mining, processing and signoff flows (Python/TCL/Perl).
  • Anticipate and resolve PDN issues across development phases to meet project schedules.

Requirements

Must-have technical skills and experience to perform the role:

  • Experience with PDN/EMIR and power integrity tools such as RedHawk, RHSC, Voltus, PTPX.
  • Solid knowledge of ASIC RTL-to-GDS flows: synthesis, floorplanning, PnR, CTS, STA, timing closure.
  • Strong automation skills: Python, TCL or Perl.
  • Demonstrated problem-solving ability and capability to deliver practical solutions under timelines.
  • Good communication skills in a multi-disciplinary engineering environment.
  • 3+ years of related ASIC or power-integrity experience.

Nice-to-have:

  • Experience with package design, system-level PDN analyses, thermal analysis or circuit simulation tools.
  • Knowledge of multi-die (2.5D/3D) ICs and packaging.

Education Requirements

Bachelor's degree in Science, Engineering, or a related field with 4+ years' relevant experience; OR Master's degree with 3+ years; OR PhD with 2+ years. Candidates with equivalent practical experience will be considered.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-09-04