Power IC Design Engineer

Job Title

Power IC Design Engineer

Role Summary

Develop high-performance power management circuit blocks (transistor level) for integrated circuits in ADI's Shanghai design center. Execute designs from schematic through silicon validation and work with global teams on process and product development.

Experience Level

Senior level. Typical experience: MSEE with 7+ years power IC design experience or PhD with 5+ years; BSEE with equivalent depth considered.

Responsibilities

Deliver transistor-level power IC designs and support silicon bring-up and production release.

• Design and implement DC-DC converters (buck, boost, buck-boost), LDOs, charge pumps, gate drivers, power stages, and protection circuits at the transistor level.
• Perform schematic capture, simulation, layout oversight, parasitic-aware post-layout verification, and tape-out delivery.
• Optimize transient response, loop bandwidth, load regulation, and power-stage efficiency across process corners and operating conditions.
• Support silicon bring-up, debug, bench correlation, and reliability assessment (electromigration, hot-carrier, high-voltage stress).
• Collaborate with global cross-functional design teams on architecture trade-offs for efficiency, area, EMI, reliability, and cost.
• Apply or evaluate AI/ML techniques to improve design automation, optimization, and modeling workflows.
• Travel as required for collaboration and silicon debug (approximately 10%).

Requirements

Core technical skills and experience required for immediate contribution to power-IC projects.

• Must-have: Demonstrated transistor-level power IC design skills and proven delivery through tape-out, silicon validation, and production release.
• Must-have: Proficiency with Cadence Virtuoso and Spectre/APS or equivalent IC design and power-stage simulation environments.
• Must-have: Strong control-loop design, compensation techniques, and stability analysis experience for switching and linear regulators.
• Must-have: Solid understanding of BCD, HV-CMOS and power FET process technologies, device physics, and safe operating area constraints.
• Must-have: Experience with parasitic-aware simulation, Monte Carlo/yield-oriented design centering, and power-stage optimization.
• Must-have: Experience with silicon bring-up, measurement correlation to simulation, and cross-site engineering collaboration.
• Must-have: Fluent in Mandarin and strong English written/verbal communication for global collaboration.
• Nice-to-have: Experience applying AI/ML to design automation, magnetics/inductor co-design, thermal/package power dissipation modeling, and EMI/EMC mitigation.
• Nice-to-have: Strong analytical and problem-solving abilities and familiarity with reliability analysis for power devices.

Education Requirements

MSEE with 7+ years of relevant power IC design experience, or PhD with 5+ years. BSEE considered if it provides equivalent depth of experience. Fields typically include Electrical Engineering, Power Electronics, or related technical disciplines; equivalent practical experience accepted.

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.