Power Delivery Design Engineer
Intel CorporationJob Title
Power Delivery Design Engineer
Role Summary
Join a platform engineering team developing power delivery hardware for next-generation GPUs and AI accelerators. The role focuses on power delivery architecture, simulation, board-level implementation, and cross-functional integration with silicon, board, firmware, and validation teams.
Experience Level
Mid-level - typically requires 5+ years of relevant industry experience.
Responsibilities
Own end-to-end power delivery design, simulation, verification, and integration for platform products.
- Develop PDN models and run DC (IR-drop), AC (target-impedance), and transient (droop, Ldi/dt) analyses across die, package, and PCB.
- Design and validate multi-phase DC-DC conversion and power management solutions for platform power rails.
- Create decoupling, stack-up, plane assignment, and power sequencing strategies prior to layout.
- Architect boards for debug and observability (sense points, telemetry, probe landings, isolation, margining).
- Design configurable solutions to support multiple SKUs (stuffing options, pin-compatible footprints, programmable control).
- Build and execute test plans; correlate bench and VR test measurements with simulation.
- Lead failure analysis and root-cause investigations and implement corrective actions.
- Collaborate with silicon architects, board/layout, firmware/software, and systems validation to deliver platform design collateral.
Requirements
Must-have technical skills and experience; preferred items listed separately.
- Minimum 5+ years of industry experience in power delivery or related hardware design.
- Design experience with low-voltage, high-current, multi-phase DC-DC switching regulators (buck, boost) optimized for transient response and efficiency.
- Experience with power integrity and PDN simulation tools (e.g., Cadence Sigrity PowerDC/PowerSI, Ansys SIwave).
- Experience creating and validating SPICE/time-based simulation models (LTSpice, SIMPLIS) from SoC power requirements.
- PDN modeling across die, package, and PCB including stackup, decoupling networks, and S-parameter extraction/correlation.
- Hands-on hardware debugging with oscilloscopes, data acquisition, and bench measurement tools.
- Practical experience working with signal/power integrity, PCB layout, and mechanical teams on board designs.
Nice-to-have
- Design-for-debug/testability, telemetry instrumentation, voltage margining, and rail isolation experience.
- Experience designing configurable boards to support multiple SKUs and high-volume production/cost optimization.
- Familiarity with GaN devices, switched-capacitor topologies, or emerging power technologies.
- Project leadership and global interaction with ODM/OEM partners; willingness to travel.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering or a related field.
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
