Post-Silicon Validation, Senior Manager
SynopsysJob Title
Post-Silicon Validation, Senior Manager
Role Summary
Lead a team of validation and characterization engineers responsible for post-silicon validation of UCIe-based die-to-die interface IP. Own end-to-end characterization of internal testchips, customer silicon bring-up and debug, lab operations, and the methodologies that enable reliable silicon sign-off.
Experience Level
Senior - position requires substantial managerial and technical experience. The posting specifies a Bachelor's degree plus a minimum of 10 years related experience, or an advanced degree with a minimum of 8 years.
Responsibilities
Direct technical and operational ownership of post-silicon validation and customer support activities.
- Manage and grow a team of validation and characterization engineers: hiring, performance management, goal setting, and career development.
- Define and execute characterization plans for internal testchips; collect data, correlate to simulation/design intent, confirm datasheet parameters, and drive silicon sign-off.
- Lead customer silicon bring-up and debug including link training, lane repair, degraded mode operation, and interoperability troubleshooting via remote and on-site engagement.
- Plan and allocate personnel to meet schedules and balance internal programs with ad-hoc customer needs.
- Own lab operations, capital equipment decisions, and validation infrastructure build vs buy tradeoffs.
- Establish standards and methodologies for measurements, correlation, sign-off criteria, and customer lab engagement.
- Serve as escalation owner for critical silicon issues; communicate technical risk and mitigation to leadership.
Requirements
Must-have technical and management capabilities. Education requirements are summarized separately below.
- Proven people management experience within silicon or hardware engineering organizations, including hiring and technical career development.
- Extensive hands-on experience in post-silicon characterization, validation, and debug of high-speed mixed-signal interface IP; familiarity with analog and digital design, firmware, packaging, or product engineering.
- Working knowledge of UCIe ecosystem, PHY and D2D adapter layers, link training, and packaging tradeoffs; strong high-speed SerDes background applicable.
- Experience owning R&D lab operations and using high-speed instrumentation (oscilloscopes, BERTs, spectrum/network analyzers).
- Familiarity with validation software and automation development (Python, C, C++) sufficient to set direction and evaluate tradeoffs.
- Proven track record engaging major customers on technical matters, including silicon bring-up support and escalation.
Education Requirements
Bachelor's degree in Electrical or Computer Engineering with a minimum of 10 years of related experience, or an advanced degree with a minimum of 8 years of related experience.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
