Post-Silicon Validation — FPGA

Job Title

Post-Silicon Validation — FPGA

Role Summary

Lead post-silicon and FPGA design bring-up and validation activities for assigned products. Deliver validation coverage across PVT and functional domains, build scalable test suites and automation, and perform root-cause debug across hardware, firmware, RTL and board issues.

Work closely with design verification (DV), IP/integration teams, and customer support to enable production-quality outcomes and support milestone reviews and escalations.

Experience Level

Mid-level; typically 5–8 years of experience in post-silicon/FPGA/hardware validation or protocol bring-up.

Responsibilities

Primary responsibilities include planning and executing validation and delivering automation and debug results.

• Lead FPGA/silicon design bring-up and validation activities.
• Plan and execute PVT testing (corners, voltage/temp sweeps, fmax/margin, stress) and non-PVT testing (functional, feature, system).
• Define, maintain, and scale test suites: content, automation, overnight runs, fail triage, and exit criteria.
• Architect and deliver test and design automation using Python, Tcl, and C; extend VSIP for validation workflows.
• Use RTL and on-chip debug to isolate failures across hardware, timing, firmware, and board; perform end-to-end lab and silicon debug.
• Set test plans, coverage expectations, and validation exit criteria for assigned work.
• Collaborate with DV, IP/integration (IPSS), and Customer Support on correlation, integration, and field issues.
• Represent validation in milestone reviews and technical escalations.

Requirements

Must-have technical skills and experience for the role.

• 5–8 years' experience in post-silicon / FPGA / hardware validation or protocol bring-up; proven ownership through production-quality results.
• Hands-on PVT planning, execution, and failure analysis.
• Automation experience in Python, Tcl, and C; experience developing VSIP for validation workflows.
• Strong hardware and lab debug skills (JTAG/on-chip debug, scopes, protocol analyzers); fail isolation to root cause across HW, firmware, board, and silicon.
• RTL debug experience (Verilog/SystemVerilog or VHDL).
• Proficiency with FPGA tools and lab equipment for bring-up and validation.
• Demonstrated collaboration with DV, IP/integration, and customer-facing teams; clear technical writing for plans, bugs, and status.

Nice-to-have:

• Validation knowledge of Ethernet, ANLT, PTP, D-PHY, CPRI, JESD, SerialLite, DisplayPort, HDMI, SATA, SAS.
• Thermal/shmoo/margin characterization and board/schematic literacy; basic SI/PI for high-speed links.
• Emulation or pre-silicon to post-silicon correlation experience.
• Self-motivated individual contributor who delivers with limited oversight and collaborates effectively across teams.

Education Requirements

B.E. / B.Tech / M.S. in Electronics & Communication Engineering, Electrical Engineering, Computer Engineering, or a related technical field.

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.