Post-Silicon Validation Engineer
VoltaiJob Title
Post-Silicon Validation Engineer
Role Summary
Responsible for post-silicon bring-up, validation, and debugging of SoCs and IP. Execute lab validation, develop automated test infrastructure, and correlate silicon behavior with pre-silicon results to improve designs and verification flows.
Work closely with design, DFT, and product engineering; documented silicon findings will feed into Voltai's models and verification processes.
Experience Level
Mid-level; requires approximately 5+ years of post-silicon validation or bring-up experience.
Responsibilities
Primary responsibilities include planning and executing silicon bring-up, creating validation content, and driving root-cause analysis.
- Plan and execute post-silicon bring-up and validation for SoCs and IP.
- Develop validation content, test plans, and automated test infrastructure.
- Debug silicon failures across logic, timing, power, and system interactions.
- Correlate silicon results with pre-silicon simulation, emulation, and formal verification outputs.
- Collaborate with design, DFT, and product teams to drive root cause analysis and fixes.
- Capture and document silicon learnings to feed back into verification and modeling flows.
Requirements
Must-have technical skills and experience. Nice-to-have items listed separately.
- 5+ years post-silicon validation or bring-up experience.
- Hands-on lab experience with oscilloscopes, logic analyzers, JTAG, and similar debug tools.
- Strong Python and C/C++ skills for test automation.
- Experience with high-speed interfaces (PCIe, DDR, Ethernet, or similar).
- Systematic hardware/software debug skills across logic, timing, power, and system interactions.
Nice-to-have:
- Silicon characterization and yield analysis experience.
- Background in pre-silicon verification.
- Interest or experience with AI-assisted design tools.
Education Requirements
Not specified.
About the Company
Company: Voltai
Headquarters: Palo Alto, CA, United States
Voltai develops AI-driven world models and agents to design, evaluate, and optimize physical systems-focusing on hardware, electronics, and semiconductors to enable AI-led hardware co-design, performance modeling, and cross-domain optimization.
