Platform Technologies Language Design Intern
Intern on the Platform Engineering Technologies team supporting and enhancing tools for System-on-Chip (SoC) design. Work focuses on domain-specific languages and toolchains used by SiFive engineers to design and verify RISC-V CPUs, IP, and SoCs.
Typical work includes a project aligned to your skills and interests such as adding features or improving the Chisel language and participating in related open-source communities.
Entry-level β Internship (student or recent graduate). No specific years of professional experience required.
You will complete a focused project and contribute to language/tool development and verification workflows.
Core qualifications and desirable skills.
Not specified.
Company: SiFive
Headquarters: San Mateo, California, United States
SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.
