Skip to main content
Synopsys logo

Physical Design Staff Application Engineer

Synopsys
October 7, 2026
Full-time
On-site
Hillsboro, Oregon, United States
$112,000 - $168,000 USD yearly
Physical Design Jobs, Level - Senior

Job Title

Physical Design Staff Application Engineer

Role Summary

Support customers implementing advanced-node ASICs using Synopsys physical design tools. Focus areas include methodology and flow development, automation, debugging complex implementation issues, and feeding customer-driven requirements into product R&D.

Experience Level

Senior level - guidance: typically 5+ years ASIC physical design experience with a Bachelor's degree, or 3+ years with a Master's degree (see Education Requirements).

Responsibilities

Primary duties include customer-facing engineering, methodology development, automation, and collaboration with product teams.

  • Support customer engagements on advanced-node designs (7nm, 5nm, and below) using Fusion Compiler, ICC2, or equivalent tools to meet PPA and schedule goals.
  • Develop and maintain automation and methodology using TCL, Python, and Perl across the RTL-to-GDS flow.
  • Debug complex physical design issues: placement, clock tree synthesis, routing, timing closure, power optimization, and electromigration.
  • Deliver tailored methodology recommendations and provide on-site support and design reviews during critical tape-out phases.
  • Collaborate with R&D, product management, and field teams to translate customer issues into product requirements and enhancements.
  • Contribute to AI/ML-driven optimization initiatives and apply data-driven approaches to implementation challenges.

Requirements

Must-have technical skills and practical experience; nice-to-have items summarized after the list.

  • Hands-on ASIC physical design experience on production/tape-out designs at advanced nodes.
  • Proficiency with industry implementation tools such as Synopsys ICC2, Fusion Compiler, or Cadence Innovus.
  • Strong scripting and automation skills in TCL and Python (Perl acceptable).
  • Deep understanding of advanced-node implementation tradeoffs, multi-patterning, and EM concerns.
  • Familiarity with logical and physical synthesis flows.
  • Strong communication and presentation skills for direct customer engagement.
  • Willingness to travel to customer sites, sometimes on short notice.

Nice-to-have: prior experience with AI/ML-driven optimization techniques and machine-learning-based design flows.

Education Requirements

Bachelor's degree in Electrical Engineering or a related technical field with 5+ years of hands-on ASIC physical design experience, or a Master's degree with 3+ years of hands-on ASIC physical design experience. No certifications or explicit "equivalent experience" language specified.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

Synopsys logo

Date Posted: 2026-10-04