Physical Design Signoff CAD Engineer
Develop and maintain physical-design and signoff CAD flows and methodologies for networking SoCs within NVIDIA's Networking Silicon engineering team. The role focuses on STA, timing closure, power integrity, IR-drop/EM analysis and back-end verification to deliver signoff-quality chips.
Work closely with block owners and full-chip STA engineers to converge designs and resolve complex physical-design issues across multiple projects.
Entry-level / Early-career β 2+ years of relevant full-time experience in physical design, backend CAD, or STA and timing-closure work.
Primary responsibilities include developing flows, driving signoff readiness, and collaborating across teams.
Must-have skills and experience required to perform the role; nice-to-have items listed separately.
Nice-to-have:
B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering, or equivalent practical experience.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
