Physical Design Engineer, Synthesis and Implementation
Join the Networking Silicon physical design team to own and improve RTL-to-gate synthesis and support physical implementation for high-speed communication ASICs. The role focuses on synthesis quality-of-result (QoR), optimization of constraints and flows, and collaboration with RTL, timing, architecture, and physical design engineers to achieve performance, power, and area targets.
Mid-level (engineering role typically filled by candidates with practical experience; this posting requests a minimum of 2+ years working in synthesis and implementation).
Primary responsibilities include taking ownership of synthesis flows, identifying and resolving QoR and implementation issues, and automating and improving methodologies.
Must-have technical skills and experience.
Nice-to-have:
BSEE or MSEE preferred, or equivalent practical experience. Related technical degrees (e.g., Electrical Engineering, Computer Engineering, Computer Science) or demonstrated equivalent industry experience are acceptable.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
