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Physical Design Engineer, Synthesis and Implementation

NVIDIA
August 04, 2026
Full-time
On-site
Westford, Massachusetts, United States
$116,000 - $218,500 USD yearly
Physical Design Jobs, Level - Mid-Career

Job Title

Physical Design Engineer, Synthesis and Implementation

Role Summary

Join the Networking Silicon physical design team to own and improve RTL-to-gate synthesis and support physical implementation for high-speed communication ASICs. The role focuses on synthesis quality-of-result (QoR), optimization of constraints and flows, and collaboration with RTL, timing, architecture, and physical design engineers to achieve performance, power, and area targets.

Experience Level

Mid-level (engineering role typically filled by candidates with practical experience; this posting requests a minimum of 2+ years working in synthesis and implementation).

Responsibilities

Primary responsibilities include taking ownership of synthesis flows, identifying and resolving QoR and implementation issues, and automating and improving methodologies.

  • Own RTL-to-gate synthesis and drive QoR convergence for complex digital blocks and hierarchical partitions.
  • Optimize synthesis strategies, constraints, and flows to meet performance, power, and area goals.
  • Analyze design bottlenecks and QoR regressions; collaborate with RTL, timing, architecture, and physical teams to resolve issues.
  • Support physical implementation from floorplanning and power planning through routing and timing closure.
  • Automate design setup, execution, reporting, and issue triage; improve project-wide methodologies and best-known methods.

Requirements

Must-have technical skills and experience.

  • Minimum 2+ years of hands-on experience in synthesis and physical implementation on advanced process nodes.
  • Strong proficiency with synthesis tools such as Synopsys Fusion Compiler, Cadence Genus, or comparable tools.
  • Practical experience with synthesis constraints, timing analysis, QoR optimization, and full place-and-route flow.
  • Strong analytical and debugging skills across RTL, synthesis, timing, and physical implementation.
  • Proficiency in Python, Perl, Tcl, and Make for automation and flow integration.
  • Effective verbal and written communication and ability to collaborate across functions.

Nice-to-have:

  • Experience with networking or high-speed communication ASICs and associated timing/power optimization challenges.

Education Requirements

BSEE or MSEE preferred, or equivalent practical experience. Related technical degrees (e.g., Electrical Engineering, Computer Engineering, Computer Science) or demonstrated equivalent industry experience are acceptable.


About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.

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Date Posted: 2026-08-01