Physical Design Engineer, Sr Staff
QualcommJob Title
Physical Design Engineer, Sr Staff
Role Summary
Senior physical design engineer responsible for Camera block place-and-route (PNR) implementation and timing closure. The role works within the hardware engineering/physical design team to deliver optimized power, performance, and area (PPA) for high-performance and low-power ASIC designs.
Main responsibilities include driving end-to-end physical implementation, collaborating with design and CAD teams, and engaging with external tool vendors to resolve implementation and optimization issues.
Experience Level
Senior — typically 12+ years of professional experience in physical design, including floorplanning, place & route, clock tree synthesis, STA signoff, and power/PDN analysis.
Responsibilities
Core responsibilities for this role include technical leadership of physical implementation and cross-team coordination.
- Lead end-to-end physical design from netlist to GDSII for Camera block implementations.
- Perform floorplanning, place & route, clock tree synthesis (CTS), STA signoff, IR drop and PDN analysis, and post-route optimization.
- Implement ECOs and timing convergence flows across multiple corners using physical and STA-based ECO methods.
- Develop and apply optimization techniques to meet stringent PPA targets for power, performance, and area.
- Collaborate with RTL design, CAD, and block-level implementation teams to resolve physical design challenges.
- Engage with internal CAD teams and external tool vendors to identify and improve tool flows and optimizations specific to Camera designs.
Requirements
Must-have technical skills and domain experience; list separates essential vs preferred.
- Must-have: Extensive hands-on experience with full physical design flow: floorplanning, PNR, CTS, STA signoff, and post-route optimization.
- Must-have: Proven ownership of end-to-end physical design including low-power checks, PDN design, HM-level PV, LEC, and STA closure.
- Must-have: Strong familiarity with industry tools such as Fusion Compiler, Genus, Innovus, PrimeTime, Tempus, Voltus, and RedHawk.
- Must-have: Experience implementing complex ECOs and timing convergence using Tweaker, Tempus, and physical ECO flows.
- Must-have: Proficiency in scripting for automation (Perl, Python, TCL).
- Nice-to-have: Experience in deep submicron technology nodes and advanced low-power/voltage-island methodologies.
- Nice-to-have: Strong fundamentals in VLSI concepts and power-optimization techniques.
Education Requirements
Options listed in the posting: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field (with 6+ years relevant hardware engineering experience); OR Master's degree in those fields (with 5+ years relevant experience); OR PhD in those fields (with 4+ years relevant experience). Fields referenced: Computer Science, Electrical/Electronics Engineering, Engineering, or related technical disciplines.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
