Physical Design Engineer (Senior/Staff)
Senior-level physical implementation engineer working on SOC/ASIC place-and-route using Fusion Compiler or ICC2. The role supports customer designs from floorplan through routing and signoff, provides technical guidance to customer and internal teams, and mentors junior engineers.
Senior β typically 3 to 6+ years of hands-on Place & Route experience on complex SOC or ASIC designs using Fusion Compiler or ICC2.
Primary responsibilities focus on ownership of physical implementation, debugging, automation, and customer-facing technical advisory.
Must-have technical skills and experience; signoff tool experience listed as desirable.
Bachelor's, Master's, or PhD in Electronics Engineering, Electromechanics, Telecommunications, or a related technical field β or equivalent practical experience.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
