Physical Design Engineer, Senior/Staff
QualcommJob Title
Physical Design Engineer, Senior/Staff
Role Summary
Senior physical design engineer responsible for end-to-end physical implementation of high-performance SoCs in advanced process nodes. You will join a global ASIC/physical design team working on floorplan-to-GDS implementation, STA, and power integrity to meet aggressive performance, power, and area (PPA) targets.
Experience Level
Senior. Typical experience guidance: Bachelor's +4 years, Master's +3 years, PhD +2 years in ASIC/physical design or equivalent practical experience.
Responsibilities
Main responsibilities include:
- Execute physical implementation from floorplanning through placement, CTS, routing and sign-off (netlist to GDS) for complex, high-speed designs.
- Develop and maintain scripts, flows and automation to push PPA limits and improve implementation efficiency.
- Collaborate with RTL, verification, timing, power and IP teams to achieve timing closure and power targets.
- Perform STA, power integrity and congestion analyses; use statistics and data-driven methods to identify issues and guide optimizations.
- Drive solutions for physical verification and DRC closure, and ensure design deliverables meet quality standards.
- Research and adopt industry best practices and innovative methodologies for physical design.
Requirements
Key skills and experience required (must-have first):
- Must-have: Several years of hands-on physical design experience (senior-level) including floorplanning, power planning, placement/CTS, routing and optimization steps.
- Must-have: Experience with physical design tools and flows for advanced process nodes (10nm and below).
- Must-have: Strong knowledge of STA and timing-closure methodologies and their impact on congestion, routing and power.
- Must-have: Experience in power analysis and power integrity workflows.
- Must-have: Proficient automation and scripting skills (Perl, Tcl) and ability to build/support PD flows.
- Must-have: Familiarity with physical verification and DRC closure processes.
- Good communication skills and ability to work effectively in cross-functional teams.
- Nice-to-have: Experience applying statistical/data-prediction methods to benchmark tracking and PPA improvement.
Education Requirements
Bachelor's degree in Science, Engineering, or a related field with 4+ years of ASIC/physical design experience; OR Master's degree in Science, Engineering, or related field with 3+ years; OR PhD in Science, Engineering, or related field with 2+ years. Equivalent practical experience will be considered.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
