Physical Design Engineer II (Silicon Engineering)
SpaceXJob Title
Physical Design Engineer II (Silicon Engineering)
Role Summary
Develop and implement physical design for next-generation ASICs used in space and ground Starlink systems. Work on RTL-to-GDSII implementation, signoff closure, and design-for-manufacturability in collaboration with architecture, RTL, firmware, validation, and product teams.
Experience Level
Mid-level — the role expects 3+ years of professional experience in RTL-to-GDSII physical design or physical design flow development.
Responsibilities
Deliver physical implementation and drive closure for complex digital ASICs across synthesis, placement, routing, timing, and verification.
- Perform partition synthesis and full physical implementation steps: synthesis, floorplanning, power/ground grid generation, place & route, timing optimization, and signoff checks.
- Analyze and resolve timing, congestion, noise, electromigration (EM), and voltage drop (IR) issues; drive fixes through the flow.
- Develop and improve physical design methodologies, automation, and scripts for implementation and signoff flows.
- Collaborate with ASIC designers to define timing, power, and area targets and to evaluate RTL/design tradeoffs.
- Run, debug, and close signoff checks: static timing analysis (STA), noise, logical equivalency, physical verification, EM/IR.
Requirements
Concise list of must-have skills and additional desirable skills.
- Must-have: Proven professional experience with RTL-to-GDSII physical design and/or development of physical design flows.
- Must-have: Practical experience debugging and closing STA, equivalency, physical verification, EM/IR issues.
- Must-have: Ability to work extended hours and weekends as needed to meet critical project milestones.
- Must-have: ITAR eligibility: U.S. citizen, U.S. lawful permanent resident, refugee, asylee, or otherwise able to obtain required Department of State authorizations.
- Nice-to-have: Experience with industry-standard EDA tools and understanding of their algorithms.
- Nice-to-have: Knowledge of deep sub-micron FinFET/CMOS physics, CMOS digital design, power dissipation, and basic analog/DFT concepts (DFT/Scan/MBIST/LBIST).
- Nice-to-have: Strong scripting skills (Perl, Python, TCL, shell, Makefile) and automation experience.
- Nice-to-have: Self-driven, able to work in a fast-paced cross-disciplinary environment.
Education Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science is required.
About the Company
Company: SpaceX
Headquarters: Hawthorne, California, United States
SpaceX is focused on developing space technologies to enable human exploration of Mars and beyond. The company is known for its advancements in rocketry and its Starlink satellite constellation, which delivers high-speed internet globally.
