Physical Design Engineer II — PNR / Physical Verification / STA / EMIR
Cadence Design SystemsJob Title
Physical Design Engineer II — PNR / Physical Verification / STA / EMIR
Role Summary
Work on physical implementation and signoff for advanced-node silicon IP and chips, covering PNR, physical verification, STA, and EM/IR flows. Collaborate with RTL and analog teams and help develop methodology and automation for next-generation PHY IP and tapeouts.
Focus on achieving timing, power, and DRC/LVS/EM/IR closure at advanced process nodes.
Experience Level
Mid-level. Candidate is expected to have approximately 3+ years of relevant industry experience.
Responsibilities
Primary responsibilities include implementation, signoff, and flow development:
- Participate in or lead physical design, methodology, and flow development for advanced nodes (N7/N5 and below).
- Floorplanning, power-grid design, placement, clock-tree synthesis, and routing.
- Timing closure and static timing analysis signoff.
- Power and signal integrity analysis; EM/IR signoff.
- Physical verification signoff: DRC, LVS, antenna checks; DFM closure.
- Debug and fix physical design violations (DRC, DFM, LVS, ANT, ERC).
- Develop and use scripts and automation to support methodology and flows.
- Collaborate with RTL and analog teams to prepare designs for tapeout.
Requirements
Must-have technical skills and professional attributes:
- Extensive knowledge of process design rules at N7, N5 and below.
- Proficiency with scripting languages and automation in methodology.
- Strong static timing analysis skills.
- Experience debugging and resolving physical verification and signoff issues.
- Effective communicator and team player across functional groups.
- Detail-oriented, responsible, persistent, and able to learn quickly.
Education Requirements
Bachelor's degree or higher in Electrical Engineering, Computer Engineering, Computer Science, Information Technology, or a related technical field. The posting specifies 3+ years of work experience.
About the Company
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
