Job Title
Design Engineer I
Role Summary
Join the Physical Implementation Team to translate RTL designs into manufacturable silicon, driving implementation from synthesis through physical design and tapeout. The role focuses on timing analysis, constraint development, and cross-functional coordination to deliver high-performance, low-power integrated circuits on schedule.
Experience Level
Entry-level (Design Engineer I). Suitable for early-career engineers; typical experience range: 0β3 years.
Responsibilities
Key responsibilities include:
- Support physical implementation of digital designs from RTL through GDSII/tapeout.
- Develop and maintain timing constraints (SDC) for block- and chip-level designs.
- Perform static timing analysis (STA) to identify and resolve timing violations across operating conditions.
- Assist with block- and chip-level signoff activities to meet performance, power, and quality targets.
- Collaborate with Design Engineering, Verification, DFT, and CAD to drive implementation closure.
- Analyze timing reports and recommend design or constraint improvements.
- Debug implementation, timing, and integration issues.
- Contribute to improving implementation methodologies, flows, and automation.
Requirements
Must-have skills and experience:
- Practical experience with Static Timing Analysis (STA) and development or use of timing constraints (SDC).
- Understanding of digital IC design and implementation concepts.
- Familiarity with chip- or block-level signoff methodologies.
- Strong analytical and problem-solving skills.
- Effective communication and ability to work collaboratively in cross-functional teams.
Nice-to-have:
- Experience with Cadence Tempus or Synopsys PrimeTime.
- Scripting/programming experience (Python, Perl, Tcl).
- Exposure to RTL-to-tapeout flows, Linux/Unix EDA environments, and low-power timing optimization techniques.
- Coursework, research, or project experience in digital implementation, physical design, or timing closure.
Education Requirements
Master's degree in Electrical Engineering, Computer Engineering, or a related technical field is required. The posting also references academic or project experience with STA and coursework/research in digital implementation or physical design as relevant qualifications.
About the Company
Company: Silicon Labs
Headquarters: Austin, Texas, USA
Silicon Labs is a leading innovator in low-power wireless connectivity, creating embedded technology that connects devices to improve lives. With a focus on advanced edge connectivity applications, the company provides device makers with cutting-edge solutions and support. Headquartered in Austin, Texas, Silicon Labs operates in over 16 countries, serving markets such as smart home, industrial IoT, and smart cities.

Date Posted: 2026-06-21