Physical Design Engineer

Job Title

Physical Design Engineer

Role Summary

Join Qualcomm's ASIC Physical Design team in Hod Hasharon to implement and verify digital designs from netlist to GDSII on advanced FinFET process nodes. Work under senior engineers across the full backend flow to support block/SoC physical implementation, verification, and automation efforts.

Experience Level

Entry-level. Suitable for candidates with 0–3 years of experience, including academic projects or internships.

Responsibilities

Primary responsibilities include hands-on physical implementation tasks and supporting automation and flow development under mentorship.

• Support floorplanning, placement, clock tree synthesis (CTS), and routing under guidance of senior PD engineers.
• Assist in timing closure activities: basic STA analysis, path debugging, and constraint verification.
• Run and analyze IR drop, signal integrity, and electromigration reports using standard EDA tools.
• Execute physical verification flows (DRC, LVS, DFM) and triage violations.
• Develop and maintain Python and TCL scripts to automate report parsing, constraint generation, and batch runs.
• Contribute to flow development and documentation for in-house PD automation scripts and runsets.
• Explore AI-assisted tools for constraint checking, violation triage, and design space exploration under mentor guidance.
• Collaborate with front-end, DFT, and verification teams on design handoffs and ECO implementation.

Requirements

Must-have technical skills and practical experience to perform the role.

Must-have

• 0–3 years of experience in digital physical design (academic projects and internships count).
• Basic understanding of floorplanning, place-and-route (PnR), CTS, and static timing analysis (STA).
• Familiarity with at least one EDA tool (Synopsys ICC2, Cadence Innovus, Mentor Calibre, or PrimeTime).
• Scripting experience in Python or TCL; ability to read, modify, and write automation scripts.
• Willingness to learn advanced process nodes (TSMC N5, N4P, N3 / FinFET).
• Good analytical and problem-solving skills.

Nice-to-have

• Exposure to TSMC advanced node design rules and flow specifics.
• Familiarity with DFT concepts (scan, ATPG).
• Coursework or project experience applying AI/ML to EDA or flow automation.

Education Requirements

Bachelor's degree (B.Sc. or equivalent) in Electrical Engineering, Computer Engineering, Computer Science, or a related science/engineering field - or equivalent practical experience.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.