Job Title
Physical Design Engineer
Role Summary
Join the Analog Backend team to implement the digital island within mixed-signal/analog ASICs. The role focuses on executing and improving the ASIC physical design flow for digital blocks embedded in analog environments.
Work includes floorplanning, placement and routing, clock-tree synthesis, power-integrity analysis, and physical sign-off while collaborating with analog designers and verification engineers.
Experience Level
Mid-level. Specific years of experience not stated.
Responsibilities
Core responsibilities include:
- Implement and optimize floorplanning, placement, clock-tree synthesis, routing, and physical verification for ASIC designs.
- Optimize designs for performance, reliability, and manufacturability.
- Perform chip-level power integrity analysis across multiple voltage domains (IR drop, signal electromigration, power electromigration).
- Integrate digital implementation into analog environments (digital islands in analog chips).
- Collaborate with global cross-functional teams, including analog designers and verification engineers.
Requirements
Must-have and preferred technical qualifications:
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Must-have: Experience in ASIC physical design with strong understanding of floorplanning, placement, CTS, routing, and sign-off checks.
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Must-have: Knowledge of power integrity analysis (IR drop and electromigration).
- Ability to work effectively in an international, collaborative team environment.
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Nice-to-have: Analog layout experience.
Education Requirements
Not specified.
About the Company
Company: Renesas
Headquarters: Hitachinaka, Japan
Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

Date Posted: 2026-08-11