Job Title
Physical Design Engineer
Role Summary
Join Renesas' Analog Backend team to implement digital islands inside mixed-signal ASICs. The role focuses on physical implementation and verification tasks for analog chips with embedded digital blocks.
Work with global analog and verification teams to deliver manufacturable, high-performance silicon.
Experience Level
Mid-level. No explicit years-of-experience requirement provided.
Responsibilities
Primary responsibilities include chip implementation tasks and cross-functional collaboration.
- Implement ASIC physical design flow: floorplanning, placement optimization, clock tree synthesis, routing, and physical verification.
- Optimize designs for performance, reliability, and manufacturability.
- Perform chip-level power integrity analysis across multiple voltage domains (IR drop, signal electromigration, power electromigration).
- Implement and integrate digital islands embedded within analog environments.
- Collaborate with analog designers, verification engineers, and other global teams to meet project schedules and quality targets.
Requirements
Must-have technical skills and team attributes; concise list of preferred additions.
- Experience in ASIC physical design with hands-on implementation experience.
- Strong understanding of floorplanning, placement, CTS, routing, and sign-off checks.
- Knowledge of power integrity analysis (IR drop and electromigration).
- Ability to work effectively in a distributed, international team.
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Nice-to-have: Analog layout experience.
Education Requirements
Not specified.
About the Company
Company: Renesas
Headquarters: Hitachinaka, Japan
Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

Date Posted: 2026-08-10