Physical Design Engineer
Implement physical design for digital blocks and top-level SoC, focusing on low-power techniques and timing closure. Participate in the full implementation flow from netlist handoff through tapeout.
Mid-level. Typical experience expectation: BSEE with 6+ years or MSEE with 3+ years in physical design.
Deliver physical implementation and verification tasks and collaborate with logic designers to produce manufacturable SoCs.
Key technical skills and professional attributes.
Bachelor of Science in Electrical Engineering (BSEE) with 6+ years related experience, or Master of Science in Electrical Engineering (MSEE) with 3+ years related experience.
Company: Oso Semiconductor
Headquarters: Mountain View, CA, United States
Early-stage fabless semiconductor startup developing mmWave beamforming RFICs that deliver 2β4x power reduction for phased array systems across SATCOM, 5G, and radar. Founded by UC Berkeley PhDs, the company has raised Series A funding and works with defense and commercial customers on full-custom mmWave front-end and beamformer chips.
