Physical Design Engineer

Job Title

Physical Design Engineer

Role Summary

Perform end-to-end physical design implementation for custom IP and SoC designs, translating RTL into manufacturing-ready GDS databases. The role focuses on timing closure, power and clock distribution, layout signoff, and improving physical design flow automation.

Position is part of a central engineering organization supporting product enablement, custom ASIC work, and foundry enablement; requires on-site presence in Penang.

Experience Level

Mid-level. Typical expectation: 3+ years of industry experience with a Bachelor's degree, or 2+ years with a Master's degree in the structural and physical design domain.

Responsibilities

Key responsibilities include implementation, analysis, verification, and process improvement across physical design flows.

• Execute full RTL-to-GDS physical implementation for custom IP and SoC designs.
• Perform floorplanning, power/clock distribution design, and clock tree synthesis.
• Carry out place-and-route, pin/macro placement, and layout cleanup.
• Lead static timing analysis, power noise analysis, and reliability checks to achieve timing closure.
• Drive signoff activities: formal equivalence, layout verification, and electrical rule checking.
• Apply multi-power-domain analysis, DFT implementation, and low-power methodologies.
• Analyze verification results, resolve violations, and recommend architecture or design changes.
• Improve physical design methodologies and automate flows to increase productivity and quality.

Requirements

Must-have technical skills and experience for immediate contribution.

• 3+ years of industry experience in structural/physical design (or 2+ years with advanced degree).
• Proven experience with RTL-to-GDS flows and industry-standard EDA tools for physical design and verification.
• Expertise in clock design, clock tree synthesis, timing closure, floorplanning, and multi-power-domain analysis.
• Hands-on scripting skills for automation (Perl, TCL, or Unix shell).
• Strong understanding of digital design principles, CMOS processes, and low-power design techniques.

Nice-to-have:

• Experience with standard-cell-based VLSI methodology and advanced EDA tool suites.
• Proven ability to lead technical development and mentor junior engineers.
• Strong analytical problem-solving skills and experience resolving complex ASIC/SoC design issues.
• Effective cross-functional communication and collaboration skills.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field. The posting also lists a postgraduate degree as preferred. (No explicit equivalent-experience phrasing was provided.)

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.