Physical Design Engineer

Job Title

Physical Design Engineer

Role Summary

Join HRT's Hardware team to deliver performance-critical ASICs and advance physical design methodologies on advanced process nodes. You will work from RTL handoff through GDSII to ensure timing, power, and area targets for low-latency, high-performance designs.

Estimated base salary range: 200,000 to 300,000 USD per year. This posting accepts ongoing applications; there is no application deadline.

Experience Level

Mid-level. Prior experience in high-performance ASIC design environments is expected; no specific years of experience were stated.

Responsibilities

Primary responsibilities include physical implementation, design-for-test, timing closure, and tooling to support repeatable flows.

• Drive and implement design-for-test (DFT) methodologies.
• Participate in physical implementation from RTL handoff through GDSII on advanced process nodes.
• Partner on floorplanning and physical optimization for latency-critical designs.
• Close timing across modes and corners while optimizing power, performance, and area (PPA).
• Diagnose and resolve timing bottlenecks, congestion, and IR/EM violations.
• Build, maintain, and improve automated, repeatable physical design flows.
• Develop scripts and tools to improve productivity and analyze tool outputs.
• Collaborate with RTL, architecture, and hardware teams to influence early design decisions.

Requirements

Must-have technical skills and experience; a few preferred items are noted.

• Must: Experience in high-performance ASIC design environments.
• Must: Strong fundamentals in digital logic, circuit design, and process technology.
• Must: Familiarity with DFT concepts and testing methodologies.
• Must: Strong scripting and automation skills (Python, Tcl, shell) for parsing and analyzing tool outputs.
• Must: Hands-on experience with static timing analysis and timing closure methodologies.
• Must: Expertise with industry-standard physical design and signoff tools (e.g., Innovus, PrimeTime).
• Must: Ability to diagnose complex failures and improve physical design flows.
• Preferred: Applied use of statistics in analyzing timing, power, or design data.

Education Requirements

Preferred backgrounds include mathematics, computer science, physics, or engineering; equivalent practical experience is acceptable. No specific degree or formal credential was required in the posting.

About the Company

Company: Hudson River Trading

Headquarters: New York, New York, USA

Hudson River Trading (HRT) is a leading financial technology firm that employs advanced computing solutions for algorithmic trading. Specializing in FPGA and ASIC technology, HRT focuses on creating high-performance trading systems designed to operate in real-time global markets. With a diverse team of innovators from various fields, HRT fosters a collaborative and transparent culture to drive success and promote cutting-edge developments.