Physical Design Engineer

Job Title

Physical Design Engineer

Role Summary

Join Qualcomm's DSP Physical Design team in Markham to work on implementation of DSP cores for mobile, compute, and AI products. The role focuses on physical implementation tasks across the ASIC flow, working with architecture, RTL, verification, DFT, and methodology teams.

This is an early-career position intended for engineers building expertise in timing closure, power optimization, and silicon realization.

Experience Level

Entry-level / Early-career — approximately 6 months to 2 years of relevant experience (including internships or co-op).

Responsibilities

Contribute to physical implementation activities and support design closure under guidance from senior engineers.

• Execute physical design flow tasks from netlist to GDSII: floorplanning, placement, CTS, routing, and physical verification.
• Perform timing analysis, debug timing and congestion issues, and support ECO implementations.
• Participate in PPA (power, performance, area) analysis and optimization.
• Collaborate with RTL, DFT, verification, and methodology teams to resolve implementation challenges.
• Develop scripts and automation to improve productivity and design quality.
• Support tapeout readiness and design closure activities.

Requirements

Must-have technical skills and experience relevant to ASIC physical design.

• 6 months to 2 years of experience in ASIC Physical Design, digital design, VLSI, or related semiconductor domain (including internships/co-op).
• Strong foundation in VLSI and digital design fundamentals: combinational/sequential logic, FSMs, clocking, and timing analysis.
• Familiarity with physical design concepts: floorplanning, placement, CTS, routing, timing analysis, and physical verification.
• Exposure to industry-standard EDA tools for synthesis, implementation, timing analysis, or verification.
• Basic scripting ability (Python, Tcl, Perl, or Shell) for automation tasks.
• Analytical debugging skills and effective communication/teamwork abilities.

Nice-to-have:

• Experience or coursework in Verilog/SystemVerilog, RTL design, synthesis, or verification methodologies.
• Understanding of STA, DFT fundamentals, low-power design concepts, and silicon implementation flows.
• Experience building automation tools or using data/AI-assisted engineering tools.
• Demonstrated initiative and learning agility in semiconductor design.

Education Requirements

Minimum: Bachelor's degree in Science, Engineering, or a related field. Preferred/acceptable: Bachelor's or Master's in Electrical Engineering, Computer Engineering, or a related technical field. (Source references both a Bachelor's requirement and that a Master's is acceptable.)

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.