Job Title
Physical Design Engineer
Role Summary
Implement high-performance blocks for RISC-V CPUs and AI/ML accelerators and own the end-to-end physical implementation flow from synthesis through tapeout. Work closely with architecture, RTL/IP, and verification teams to meet performance, power, and area targets.
This is a hybrid role based out of Austin, TX; Santa Clara, CA; or Fort Collins, CO. Compensation range stated in the posting: $100,000 - $500,000 total (base + variable), dependent on experience and location.
Experience Level
Mid-level. The posting states candidates at various experience levels will be considered and the final level will be determined during interview; no explicit years-of-experience requirement provided.
Responsibilities
Key responsibilities include design implementation, PPA optimization, and signoff ownership:
- Own synthesis, placement & routing, timing closure, and final tapeout activities for assigned blocks.
- Optimize performance, power, and area through micro-architecture and implementation techniques.
- Develop and maintain physical design flows, scripts, and automation.
- Collaborate with architects, RTL engineers, IP owners, and verification teams to drive physical design requirements from early architecture to signoff.
- Debug complex implementation and timing issues across design hierarchies and hand off fixes to RTL/IP teams.
- Participate in signoff activities including static timing, power, and reliability reviews.
Requirements
Must-have technical skills and qualifications:
- Proven hands-on experience with synthesis, place & route, and timing closure on taped-out ASIC/SOC designs.
- Proficiency with industry-standard implementation and signoff tools such as FusionCompiler, PrimeTime, and RedHawk.
- Strong scripting ability (Tcl, Perl, Python) for flow automation and debugging.
- Experience with advanced-node challenges and low-power design techniques (power gating, multi-Vt, voltage scaling).
- Ability to define and drive physical design requirements from architecture through final signoff.
- Clear problem-solving skills and experience debugging across RTL and physical domains; strong collaboration and communication abilities.
- Must be eligible to access U.S. export-controlled technology where required (citizenship/permanent residency or ability to obtain required government approvals).
Education Requirements
The posting specifies a BS, MS, or PhD in Electrical Engineering, Electrical & Computer Engineering, Computer Engineering, Computer Science, or a closely related technical field.
About the Company
Company: Tenstorrent
Headquarters: Austin, Texas, United States
Tenstorrent is a technology company focused on designing innovative computing solutions. They are known for their expertise in the development of advanced hardware, including ASICs and SoCs, aimed at enhancing performance and efficiency in various applications.

Date Posted: 2026-07-22