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Performance Model Engineer

SiFive
May 12, 2026
Full-time
On-site
Hsinchu, Taiwan
SoC Architecture Jobs, Level - Mid-Career

Job Title

Performance Model Engineer

Role Summary

Develop and validate performance models for high-performance, out-of-order CPUs used in AI and data‑intensive applications. Work closely with architects and hardware designers to explore architecture tradeoffs, analyze microarchitecture bottlenecks, and correlate models with RTL/hardware behavior.

Position sits on the CPU performance/modeling team supporting next‑generation processor IP; responsibilities cover modeling, analysis, benchmarking, and prototype implementation of microarchitecture ideas.

Experience Level

Mid-level. The posting requests candidates with practical experience in processor architecture, microarchitecture performance analysis, and performance model development; no specific years stated.

Responsibilities

Primary duties include building and using performance models to guide CPU architecture and microarchitecture decisions, and working with hardware teams to reconcile model vs. design behavior.

  • Create performance models to explore new microarchitectural ideas and optimizations.
  • Analyze CPU microarchitecture performance and identify bottlenecks.
  • Develop and run benchmarks and microbenchmarks to evaluate designs.
  • Implement model features and prototype microarchitecture changes in model code.
  • Correlate performance model results with hardware/waveform data and investigate discrepancies.
  • Present findings and recommendations to architects and design teams.

Requirements

Must-have skills and experience relevant to the role.

  • Practical experience with computer architecture and processor microarchitecture.
  • Experience in microarchitecture performance analysis and performance model development.
  • Experience designing and running benchmarks and microbenchmarks.
  • Programming skills: assembly language, C/C++.
  • Experience with waveform analysis and correlating model results to hardware behavior.
  • Familiarity with git or other source control systems.
  • Familiarity with Linux development environments and scripting (Python, shell).
  • Good presentation and communication skills.

Nice-to-have:

  • Experience with the RISC‑V V (vector) extension.

Education Requirements

Not specified.


About the Company

Company: SiFive

Headquarters: San Mateo, California, United States

SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.

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Date Posted: 2026-05-12