PERC ESD EDA Engineer

Job Title

PERC ESD EDA Engineer

Role Summary

Join the PERC ESD development team within Design Technology Platform (DTP) to develop and validate ESD and layout (LU) rule decks and verification methodologies for advanced Intel process technologies. The role works with design, reliability, CAD teams and EDA vendors to enable reliable PDKs and accelerate product delivery.

Experience Level

Entry-level. Preferred minimum of 1+ years of relevant industry experience in physical design verification or related domains.

Responsibilities

The role focuses on authoring, validating, automating, and improving ESD/LU rule decks and verification flows.

• Develop ESD/LU rule decks consistent with the ESD Design Rule Manual and reliability requirements.
• Create and maintain ESD/LU verification methodologies and specifications.
• Build and run test cases for rule debugging, validation, and signoff.
• Define QA requirements and implement automation to improve rule-check robustness and efficiency.
• Collaborate with internal design, reliability, CAD teams and external EDA vendors to define tool features and requirements.
• Investigate ESD/LU design issues, determine root causes, and drive practical cross-team solutions.
• Lead improvements to verification automation, tools, and methodologies.

Requirements

Must-have technical skills and experience.

• 1+ years industry experience in physical design verification, reliability, device physics, process technology, design rules, extraction, or related areas.
• 1+ years experience developing and debugging ESD PERC rule decks/runsets or equivalent reliability/DRC tools.
• 1+ years scripting experience (Python, Tcl, Perl, or similar) for QA and flow automation.
• Experience developing and executing rule validation and debugging test cases.
• Ability to collaborate with cross-functional teams and external EDA vendors to define requirements and implement solutions.
• Strong analytical and problem-solving skills, attention to detail, and ability to drive issues to closure.

Nice-to-have:

• Knowledge of ESD/LU PreSi models (HBM, CDM) and I/O design methodologies.
• Experience leading cross-functional initiatives, influencing stakeholders, and working across sites.
• Excellent written and verbal communication skills.

Education Requirements

Minimum: Master's degree or PhD in Electrical Engineering, Computer Engineering, or another relevant STEM field.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.