IP Design Intern
Work on External Memory Interface (EMIF) IP for FPGA products, focusing on DDR5 and LPDDR5 interfaces. The role involves RTL implementation, verification, tool integration, and cross-functional collaboration with silicon, validation, and application teams.
Entry-level / Intern. Minimum practical experience expectations: ~3+ months in digital logic hardware design or verification and ~3+ months in scripting or software programming.
Key responsibilities include design, verification, and integration of high-speed memory interface IP:
Must-have skills and experience for initial consideration (education items are listed separately under Education Requirements):
Nice-to-have:
Currently pursuing a Bachelor of Science (BS) in Computer Engineering, Engineering Science, Electrical Engineering, Computer Science, or a related technical field. Relevant experience through coursework, projects, internships, or military service is acceptable as equivalent practical experience.
Company: Altera
Headquarters: Bengaluru, Karnataka, India
Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.
