PCIe SoC Application Engineer (Senior Staff)

Job Title

PCIe SoC Application Engineer (Senior Staff)

Role Summary

Senior applications engineer responsible for guiding customers through the integration, validation, and bring-up of PCIe and high‑speed SerDes Interface IP in ASIC/SoC designs. The role sits on an applications engineering team that supports customers across multiple sites and contributes integration feedback to product R&D.

Experience Level

Senior-level: typically requires 10+ years of industry experience in IP design or SoC/ASIC integration; customer-facing technical experience expected.

Responsibilities

Provide technical leadership and hands-on support during IP integration, verification, and silicon bring-up. Key responsibilities include:

• Advise customers on integration of Interface IP (PCIe, high-speed SerDes) into SoC designs and perform detailed integration reviews.
• Troubleshoot integration issues across RTL simulation, synthesis, floorplanning, timing closure, and silicon/system bring-up.
• Support silicon bring-up and system-level characterization in lab environments; debug hardware/firmware interactions.
• Document best practices, create application notes, and deliver customer training and technical enablement.
• Work with cross-functional teams to relay customer feedback and influence IP product improvements.
• Occasionally travel to customer sites for on-site support, integration reviews, and bring-up activities.

Requirements

Must-have technical experience and skills:

• 10+ years experience in IP design, ASIC/SoC integration, or customer-facing integration/support roles.
• Strong understanding of ASIC design flows: simulation/verification, RTL synthesis, floorplanning, physical design, and timing closure.
• Hands-on expertise integrating and validating high-speed SerDes IP (PCIe, USB, SATA) into silicon designs.
• Proficiency in RTL and gate-level simulation debugging and familiarity with front-end and signoff tools such as Design Compiler, Fusion Compiler, and PrimeTime.
• Practical experience with silicon bring-up, lab characterization, and system-level debugging.
• Domain knowledge of PCI Express and SerDes implementation flows and standards.
• Strong verbal and written communication skills for technical customer engagement.

Education Requirements

Master's degree preferred; 10+ years industry experience. Equivalent practical experience will be accepted. Exceptional candidates with strong silicon debug or academic backgrounds will be considered.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.