Package Design Staff / Sr. Staff Engineer

Job Title

Package Design Staff / Sr. Staff Engineer

Role Summary

Member of Marvell's central advanced packaging organization responsible for developing high-speed microelectronic packages from concept through tapeout. Focus areas include package architecture, SI/PI-driven package design, manufacturability, reliability, and cost compliance.

Work closely with package architects, technical leads, chip and board teams, and supply chain partners to define die placement, interconnects, and package-level connectivity. Eligible for company bonus and equity programs.

Experience Level

Senior - typically 5–12 years of related professional experience.

Responsibilities

Primary responsibilities include package design, validation, and cross-functional coordination.

• Drive microelectronic package development from concept through tapeout.
• Develop C4 and BGA ball maps optimized for SI/PI and layout efficiency.
• Plan and validate netlist mappings across dies, interposers, and substrates.
• Define die placement, padstacks, net assignments, and package-level connectivity.
• Create and maintain Package Requirement Documents (PRDs) with stackups and design constraints.
• Ensure manufacturability, performance, reliability, and cost targets are met.
• Collaborate with chip, board, and electrical simulation teams for package/system co-design.
• Contribute to tool, process, and flow development and maintain design libraries and automation scripts.

Requirements

Must-have skills and relevant experience, followed by desirable additions.

• Must-have: 5–12 years of relevant experience in IC package development.
• Must-have: Experience developing netlists and schematics for large, complex packages.
• Must-have: Experience creating C4 and BGA ball maps for high-pin-count designs.
• Must-have: Proficiency with Cadence OrbitIO, Integrity System Planner (ISP), or equivalent package design tools.
• Must-have: Strong understanding of package design rules, breakout, place-and-route, pinout optimization, power distribution, and reference planes.
• Must-have: Solid grasp of SI/PI fundamentals at substrate, board, and system levels.
• Must-have: Familiarity with foundry design rules and substrate manufacturing constraints.
• Nice-to-have: Experience with 2D/2.5D and advanced packaging architectures (CoWoS, EMIB, CPO, CPC) and thermal/mechanical constraints (warpage, TIM).
• Nice-to-have: Experience running and interpreting signal and power simulations, and basic scripting for automation.
• Strong communication, presentation, and documentation skills; ability to work across global cross-functional teams.
• May require eligibility to access export-controlled technology; export license review may apply prior to employment.

Education Requirements

Not specified.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.