Package Design, Signal and Power Integrity Senior Staff Engineer

Job Title

Package Design, Signal and Power Integrity Senior Staff Engineer

Role Summary

Senior staff engineer on Marvell's central advanced packaging team responsible for high-speed IC package SI/PI, PDN and interconnect design, modeling, simulation methodology and measurement correlation for next-generation packages supporting very high data rates.

The role requires independent technical ownership across architecture, implementation and validation, and collaboration with cross-functional teams to develop practical interconnect and power-delivery solutions.

Experience Level

Senior-level (Senior Staff). Years of experience: not specified in the posting.

Responsibilities

Primary responsibilities focus on SI/PI and power-delivery engineering for advanced packages.

• Design, model and characterize package interconnects and power-delivery networks (PDN).
• Develop and validate SI/PI simulation methodologies and correlate simulations with lab measurements.
• Drive SI/PI design from architecture through implementation and validation.
• Work on custom high-speed interfaces and define design rules where standard methodologies do not exist.
• Explore new interconnect architectures and propose practical solutions balancing performance and manufacturability.
• Perform lab measurements and equipment-based characterization (e.g., VNA, TDR) and establish root-cause for channel/PDN issues.
• Collaborate with cross-functional teams including assembly, layout, analog/digital designers and product teams.

Requirements

Core technical skills and tool experience required. Education requirements are listed separately below.

• Strong understanding of transmission-line theory and electromagnetic fundamentals.
• Deep knowledge of frequency- and time-domain analysis in high-speed design.
• Proven ability to independently solve complex SI/PI problems and drive projects to validation.
• Experience developing SI/PI workflows and evaluating tool trade-offs.
• Experience with 2-D and 3-D EM simulation tools such as Ansys HFSS, SIwave, Cadence Clarity.
• Power-plane design and PDN analysis experience using tools like PowerSI or Siwave.
• Working knowledge of channel and circuit simulators (e.g., ADS, HSpice).
• Hands-on experience with lab measurement equipment (VNA, TDR) and measurement correlation.
• Familiarity with PCB/package layout tools such as Allegro, APD or PADS.
• Strong communication, presentation and documentation skills; team-oriented.

Nice-to-have:

• Familiarity with packaging technologies, substrate design and assembly rules.
• Thermal and mechanical analysis experience related to IC package development.
• Experience with high-speed electronic packaging (digital and analog ICs), 2.5D/3D package development and CPC/CPO connectors.
• Ability to automate SI/PI and packaging workflows using scripting (Python).
• Experience managing package development across multiple cross-functional teams.

Education Requirements

MS or PhD in Electrical Engineering or Computer Engineering with relevant industry experience (as stated in the posting).

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.