Onsite FPGA Engineer — Verilog

Job Title

Onsite FPGA Engineer — Verilog

Role Summary

Keystone Distinction Group is seeking an FPGA Engineer to design and architect next-generation Electronic Safe and Arm Devices for Department of Defense systems. The role is onsite in Cincinnati, OH and focuses on Verilog RTL design, system integration, and lab validation.

Relocation assistance is available for qualified candidates. US citizenship is required.

Experience Level

Mid-level. No specific years of experience were listed in the source.

Responsibilities

Primary responsibilities include RTL design, verification, and lab validation for FPGA-based safety and arming devices.

• Design and implement Verilog RTL for FPGA targets.
• Develop and maintain embedded C code for system interfaces and test firmware.
• Create test benches and perform functional verification of FPGA designs.
• Integrate FPGA designs with hardware in the lab using oscilloscopes, logic analyzers, and other lab tools.
• Collaborate with systems engineers on architecture, requirements, and DoD-related constraints.
• Document designs, test plans, and test results for technical reviews.

Requirements

Key qualifications and constraints for the role.

• Must-have: US citizenship and ability to work onsite in Cincinnati, OH.
• Must-have: Strong experience with Verilog RTL design.
• Must-have: Proficiency in C programming for embedded systems.
• Must-have: Hands-on experience with lab equipment (oscilloscopes, logic analyzers, JTAG programmers, etc.) and hardware bring-up.
• Nice-to-have: Prior work on Department of Defense or other regulated systems.
• Nice-to-have: Experience with FPGA toolchains, synthesis, timing closure, and board-level debugging.
• Relocation assistance is provided for the right candidate.

Education Requirements

Not specified.

About the Company

Company: Beacon Industries

Technology/engineering company focused on analog and mixed-signal integrated circuit design and custom IC layout (SerDes, SRAM, high-speed interfaces), using Synopsys/Cadence EDA tools for design, simulation, verification, and silicon validation.