NPU AI/Processor Architecture Design - Staff

Job Title

NPU AI/Processor Architecture Design - Staff

Role Summary

Join Qualcomm's Hexagon NPU team in Bangalore to design high-performance, energy-efficient CPU and AI processor IP. The role focuses on micro-architecture, RTL design, verification/bring-up, and system-level optimization for AI inference and CPU subsystems.

The position contributes to processor architecture, RTL implementation, and cross-functional integration to deliver silicon IP used in Snapdragon platforms.

Experience Level

Senior - candidates are expected to have substantial hardware/processor design experience; the team prefers engineers with 8+ years of relevant experience, with minimum experience requirements varying by degree (see Education Requirements).

Responsibilities

Core responsibilities include design, validation, and integration of CPU/AI processor features and supporting silicon bring-up.

• Design and implement RTL for high-performance CPU and AI processor blocks (arithmetic, floating-point, vector, matrix multiply engines).
• Define and drive micro-architecture and architecture decisions for compute and memory subsystems (load/store, caches, coherence, atomics).
• Work on branch prediction, out-of-order execution, dispatch, schedulers, and multi-thread/multi-processor support.
• Optimize power, performance, and area (PPA) at block and system level and contribute to power-management architecture.
• Perform simulations, analyses, and verification to validate complex designs and features.
• Collaborate with verification, validation, software, systems engineering, and architecture teams to integrate new requirements.
• Participate in silicon bring-up, debug, reliability (RAS), and functional safety activities.
• Produce technical documentation and provide guidance to other engineers; may provide technical leadership for projects.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Significant hands-on experience in CPU/AI processor micro-architecture and RTL design (multiple years; senior level expected).
• Expertise in computer arithmetic, floating-point design, and matrix/vector compute units.
• Experience with memory subsystem design: load/store, caches, atomics, coherence and consistency.
• Knowledge of branch prediction, out-of-order pipelines, dispatch and scheduling, and multi-core/threaded systems.
• Experience with RAS (reliability, availability, serviceability), system/silicon debug, and functional safety considerations.
• Proven ability to optimize designs for power, performance, and area; familiarity with power-management concepts and flows.
• Strong verbal and written communication skills and ability to work independently and mentor others.

Preferred:

• Experience with circuit design, schematic capture and circuit simulation tools.
• Familiarity with hardware measurement instruments (oscilloscopes, spectrum analyzers, RF tools) and silicon bring-up.
• Experience with RISC-V architecture and related toolchains.
• Prior technical leadership experience (project or team-level leadership).

Education Requirements

Bachelor's, Master's, or PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or a related technical field. The posting specifies degree-plus-experience trade-offs: Bachelor's + 4+ years, Master's + 3+ years, or PhD + 2+ years of relevant hardware engineering experience. Master's degree is listed as preferred.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.