NoC Interconnect Design Engineer and Architect
QualcommJob Title
NoC Interconnect Design Engineer and Architect
Role Summary
The engineer will support design and architecture work for Network-on-Chip (NoC) interconnect IP and related SoC blocks. Work includes modeling, design (digital and/or analog), verification, implementation and documentation of IP and block-level deliverables within an ASIC/SoC development flow.
Position sits within the ASICS Engineering organization and collaborates with cross-functional teams to meet system requirements, optimize power and timing, and enable integration into larger SoC designs.
Experience Level
Entry-level / early-career. Role is suitable for candidates with limited industry experience (months to a few years); the team expects work under supervision with growing responsibility.
Responsibilities
Key day-to-day responsibilities include:
- Support definition, modeling, design, optimization, verification, validation, implementation and documentation of IP (block/SoC) development.
- Assist creation of architectures, circuit specifications, logic designs and system-level simulations based on requirements.
- Collaborate on implementation strategies to meet system and customer requirements.
- Support evaluation of design flow from high-level design through synthesis, place-and-route, and timing/power analysis or equivalent custom circuit/layout flow.
- Use EDA tools and flows (e.g., RTL-to-GDS, Virtuoso) to execute portions of block/SoC or IC package design.
- Produce technical documentation for EDA/IP/ASIC projects and communicate progress to the team.
Requirements
Core skills and experience for a successful candidate. Items marked "Nice-to-have" are preferred but not mandatory.
- Must-have: Basic ASIC knowledge and familiarity with digital and/or analog block/SoC design concepts and flows.
- Must-have: Ability to write clear technical documentation and communicate effectively with cross-functional teams; able to work under supervision.
- Nice-to-have: ~6+ months experience with architecture and design tools and methodologies.
- Nice-to-have: ~6+ months experience with scripting tools and programming languages used in design automation or verification.
- Nice-to-have: ~6+ months experience with design verification methods and flows.
- Nice-to-have: Practical familiarity with RTL-to-GDS flow, Virtuoso, synthesis, place-and-route, and timing/power analysis.
Education Requirements
Bachelor's degree in Science, Engineering, or a related field is required. A Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science is preferred.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
