NoC Interconnect Design Engineer and Architect
QualcommJob Title
NoC Interconnect Design Engineer and Architect
Role Summary
Design and deliver network-on-chip (NoC) and interconnect micro-architecture and RTL for SoC projects. Work with SoC integration, verification, silicon validation, and software teams to analyze performance, define IP interoperability guidelines, and deploy interconnect protocols in production chips.
Experience Level
Entry-level. Typical qualifications expect 1–2+ years of ASIC-related experience depending on degree (see Education Requirements for details).
Responsibilities
Core responsibilities include specification, implementation, and integration of interconnect IP:
- Create micro-architecture specifications for bus/interconnect components and evaluate performance/power/area tradeoffs.
- Analyze performance results and provide architecture recommendations and design guidelines for SoC teams.
- Deliver RTL, run synthesis and related tool flows, and support integration into SoC designs.
- Evaluate new IPs and drive adoption of bus/protocol deployments across the system.
- Support verification, silicon validation, FPGA bring-up, and collaborate with software teams for successful deployment.
- Troubleshoot design issues and participate in post-silicon debug when needed.
Requirements
Must-have technical skills and abilities:
- Knowledge of bus protocols and interconnects (AHB, AXI, CHI, network-on-chip concepts).
- Strong skills in architecture tradeoff analysis for performance, power, and area.
- Experience with ASIC implementation flows: synthesis, STA, lint, and power analysis tools.
- Practical RTL design experience and familiarity with FPGA-based bring-up and post-silicon debug.
- Ability to produce clear specifications and work collaboratively across design, verification, validation, and SW teams.
- Good troubleshooting and communication skills.
- Nice-to-have: familiarity with CPU architecture.
Education Requirements
Bachelor's degree in Science, Engineering, or a related field plus typically 2+ years of ASIC design/verification/validation/integration experience; OR Master's degree in Science, Engineering, or a related field plus typically 1+ year of relevant ASIC experience; OR PhD in Science, Engineering, or a related field.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
