NOC DV Staff Engineer

Job Title

NOC DV Staff Engineer

Role Summary

Verification architect/engineer responsible for planning and executing verification of infrastructure IPs (e.g., DDRSS, memory controllers) that integrate into SoCs. Lead IP/cluster/formal verification flows, coordinate with design, SoC, emulation and silicon teams, and drive verification quality and sign-off.

Experience Level

Senior-level. Typical candidate has 8+ years of IP verification or related experience; employer minimums vary by degree (see Education Requirements).

Responsibilities

Primary responsibilities include:

• Own DV testbench and verification collateral (checkers, trackers, scoreboards, assertions, functional coverage).
• Develop test plans and testcases; drive code and functional coverage closure at various verification levels.
• Plan and implement IP/cluster/formal verification flows and integrate with SoC-level verification.
• Collaborate with system architects, design, emulation, and SoC teams on failure debug and coverage closure.
• Analyze regression signatures, identify bug fixes, and lead quality sign-off with required documentation.
• Develop and deploy validation automation and tools (examples: Certitude, VC Formal, VPlan).
• Debug and root-cause post-silicon issues in collaboration with design, software, and test teams; assist with latency/bandwidth performance analysis.

Requirements

Core technical must-haves and preferred skills.

Must-have:

• 8+ years of IP verification or related experience (Staff/Senior level).
• Expertise in UVM-based verification and SystemVerilog testbench development.
• Experience developing monitors, scoreboards, sequencers and verification methodologies.
• Knowledge of ARM bus protocols, virtual memory concepts, and SoC system architecture.
• Strong debugging, analytical, and problem-solving skills; effective communication and collaboration across global teams.

Nice-to-have:

• Experience with low-power design (dynamic clock gating, logic/memory power collapse).
• Experience verifying designs to Automotive Safety Integrity Levels (ASIL).
• Proficiency in scripting (Python or Perl) for automation and C/C++/SystemC for performance models.
• Post-silicon bring-up and HW–SW debug experience; familiarity with silicon debug toolchains.

Education Requirements

The posting lists Bachelor's, Master's or PhD in Computer Science, Electrical/Electronics Engineering, Electronics & Communication, Microelectronics or related engineering fields. Degree-specific experience guidance appears: Bachelor's +4 years, Master's +3 years, PhD +2 years. The listing also references an expectation of ~8+ years of IP verification experience; equivalent practical experience may be considered.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.