New College Grad - Verification Enablement, Test Structure Design and Layout

Job Title

New College Grad - Verification Enablement, Test Structure Design and Layout

Role Summary

Entry-level engineering role on the verification enablement team focused on test-structure design and layout for integrated circuits. The role supports physical verification and PDK evaluation by developing verification features, rule decks, and automation to validate scribe/test structures in IC flows.

Experience Level

Entry-level (New College Grad). No specific years of professional experience specified.

Responsibilities

Primary responsibilities center on enabling physical verification and automation for scribe/test structure design and layout within IC design flows.

• Identify and define physical verification features early in the design phase by understanding process technology and scribe design architecture.
• Architect and develop verification flows, methodologies, and automation for scribe-specific simulation and physical verification.
• Advance and maintain test cases used to evaluate PDK updates in the IC design flow.
• Code and maintain DRC/LVS rule decks specific to scribe/test designs.
• Collaborate with Process Integration, CAD and PDK teams to resolve verification rule deck and flow issues.
• Implement automation scripts and rule decks using Calibre SVRF/TVF, SKILL, Perl, Python, Bash and C-shell.

Requirements

Essential technical skills and domain knowledge required for the role; preferred items listed separately.

• Must-have: Relevant experience or coursework in IC design flow development, memory or mixed-signal design and layout; understanding of front-end and back-end analog/mixed-signal flows and methodologies.
• Must-have: Knowledge of SPICE simulators (HSPICE, Finesim) and experience with schematic entry, netlist extraction, and post-layout verification.
• Must-have: Familiarity with semiconductor electrical fundamentals and device physics.
• Must-have: Experience automating IC design flows using SKILL, Perl, Python, Bash or C-shell.
• Must-have: Ability to work in cross-functional, multi-site teams across time zones.
• Nice-to-have: Experience coding physical verification flows (LVS, DRC, PEX) and rule decks using Calibre SVRF/TVF.
• Nice-to-have: Knowledge of machine learning algorithms and methodologies.
• Nice-to-have: Experience maintaining intranet portals (Confluence, SharePoint) or data visualization tools such as Microsoft Power BI.

Education Requirements

Master's or higher degree in Electrical/Electronics Engineering or a related field is specified as a minimum qualification.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.