Network Processor IP Verification Sr Lead Engineer

Job Title

Network Processor IP Verification Sr Lead Engineer

Role Summary

Lead verification efforts for network processor IP and related digital blocks within Qualcomm's hardware engineering organization. Work across design, SoC integration, software, validation and DFT teams to define verification strategy, close coverage, and support post-silicon debug.

Experience Level

Senior-level. Typical guidance: 5–8 years of strong experience in digital front-end ASIC design verification (company lists 5–8 years; minimum qualifications also describe alternate degree/experience combinations).

Responsibilities

Develop and drive verification plans and environments; coordinate with multi-site and cross-functional teams.

• Define verification strategy and testbench architecture; implement tests using SystemVerilog/UVM/C.
• Create verification components (BFMs, checkers), write assertions, and develop regression frameworks and automation scripts.
• Perform functional and power-aware verification at RTL and gate/netlist levels; analyze coverage and close gaps.
• Run simulations using Cadence/Synopsys tools and perform regression analysis and bug triage.
• Lead and mentor junior engineers; plan and track project deliverables.
• Coordinate IP integration and SoC-level verification with systems, design, SW, validation and DFT teams.
• Support performance verification (throughput/latency) and post-silicon debug activities.

Requirements

Must-have technical skills and experience; items listed as "nice-to-have" are additions that strengthen candidacy.

• Must-have: Strong RTL verification experience using SystemVerilog and UVM for complex designs with multiple clock and power domains.
• Must-have: Experience developing testbenches, BFMs, checkers, and writing assertions for temporal logic testing.
• Must-have: Proficiency in scripting (Python/Perl) and building regression/test automation frameworks.
• Must-have: Strong understanding of code and functional coverage analysis and methods to close coverage holes.
• Must-have: Experience with low-power verification methodology and clock-domain crossing issues.
• Must-have: Familiarity with common on-chip bus protocols such as AHB and AXI.
• Nice-to-have: Formal verification experience (e.g., Jasper, VCF).
• Nice-to-have: Experience verifying modem/wireless IPs (NR, LTE, WCDMA, CDMA, WLAN, Bluetooth) or similar networking IP.
• Nice-to-have: Prior post-silicon debug experience and performance verification for throughput/latency.
• Good documentation and communication skills; ability to work independently and across distributed teams.

Education Requirements

Candidates typically hold a Bachelor's or Master's degree in Engineering (Electronics, VLSI, Communications, Electrical/Electronics) or related field; PhD applicants considered. The posting also specifies degree-plus-experience combinations (e.g., Bachelors + 3+ years, Masters + 2+ years, PhD + 1+ year) as alternate minimum qualifications.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.