NCG Engineer – HBM Layout

Job Title

NCG Engineer – HBM Layout

Role Summary

Join the High Bandwidth Memory (HBM) layout team in Guadalajara to develop integrated circuit layouts for HBM technology used in AI and high-performance computing. The role focuses on creating efficient custom layouts and supporting physical verification to meet performance, power, and area targets.

Experience Level

Entry-level (new graduate). Candidates are expected to have graduated within the past two years and have early-career experience in semiconductor design or related academic projects.

Responsibilities

Produce and verify layout for cells and sub-blocks, collaborate with global teams, and continuously develop semiconductor layout skills.

• Design IC layouts for leaf cells, standard cells, and sub-blocks with attention to performance, power, area, and capacitance.
• Interpret DRC/LVS and other physical verification results to support accurate layouts.
• Apply systematic, detail-focused problem solving and plan verification tasks efficiently.
• Collaborate with engineering teams across global locations to drive layout projects to completion.
• Continue learning and contributing to HBM design projects and process improvements.
• Do not engage in contract finalization, sales agreements, pricing negotiations, or authorization of contracts as part of this role.

Requirements

Essential skills and expectations for immediate contribution.

• Strong understanding of electronic circuit concepts and circuit behavior.
• Proficiency with electronic circuit simulation or design tools.
• Effective interpersonal, communication, and problem-solving skills; conversational English.
• Motivation to learn semiconductor technology and work collaboratively on engineering teams.

Preferred / Nice-to-have

• Internship or academic project experience in pre-silicon circuit design, analog circuits, physical design, or analog layout.
• Knowledge of MOS fundamentals, semiconductor fabrication, and layout effects on speed, capacitance, power, and area.
• Experience with Cadence VLE/VXL, Siemens/Mentor Graphics Calibre DRC/LVS, or similar layout and verification tools.
• Proficiency in programming or scripting (C++, Python).
• Experience using or developing AI-enabled methods for automation and engineering problem-solving.

Education Requirements

Bachelor’s, Master’s, or PhD in Electronics, Mechatronics, Robotics Engineering, Nanotechnology, or a related technical field. Candidates are expected to have graduated within the past two years.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.