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Mixed Signal Logic Design Engineer

Intel Corporation
July 16, 2026
Full-time
Remote friendly (Hillsboro, Oregon, United States)
Worldwide
$164,470 - $232,190 USD yearly
RTL Design Jobs, Level - Senior

Job Title

Mixed Signal Logic Design Engineer

Role Summary

Design RTL and perform logic development and simulation for mixed-signal IP blocks, cell libraries, and subsystems intended for SoC integration. The role collaborates with analog, digital, and physical-design teams to define microarchitecture, ensure implementation integrity, and meet power, performance, area, and timing goals.

Experience Level

Senior-level. Typical experience requirements in this posting: Bachelor's degree + 7+ years industry experience, or Master's degree + 4+ years industry experience.

Responsibilities

Primary responsibilities include design, verification support, and cross-team integration:

  • Develop logic design, RTL (Verilog/SystemVerilog) code, and simulations for mixed-signal IP, cell libraries, and functional units.
  • Define and contribute to architecture and microarchitecture decisions for the block being designed.
  • Model analog behavior and apply mixed-signal design strategies to inform RTL and integration choices.
  • Optimize logic for power, performance, area, and timing constraints and ensure physical implementation integrity.
  • Review and validate verification plans and confirm features are properly verified.
  • Debug failing RTL tests and implement corrective measures to ensure feature correctness.
  • Support SoC customers and integration teams to ensure high-quality IP block integration.

Requirements

Must-have technical skills and experience:

  • Expert-level proficiency in Verilog / SystemVerilog for RTL design.
  • Strong digital logic fundamentals and experience integrating analog IP with digital logic.
  • Deep knowledge of RTL-to-GDSII flow, static timing analysis (STA), and clock-domain crossing (CDC) issues.
  • Familiarity with commercial EDA tools and mixed-signal simulation flows.
  • Practical understanding of timing, power, and performance trade-offs and implementation constraints.

Nice-to-have:

  • Knowledge of power delivery and power management systems.
  • Experience with analog/mixed-signal blocks such as ADCs, DACs, PLLs, and regulators.
  • DFT experience as it relates to mixed-signal IP.
  • Scripting experience (Perl, TCL/Tk, Python).
  • Strong cross-domain debugging skills.

Education Requirements

Either: Bachelor's degree in Electrical Engineering, Computer Science, Electronics and Communications Engineering, or a related field plus 7+ years of industry experience; OR Master's degree in those fields plus 4+ years of industry experience. Fields of study listed: Electrical Engineering, Computer Science, Electronics and Communications Engineering, or related technical disciplines.


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-07-15