Mixed Signal IP Verification Engineer

Job Title

Mixed Signal IP Verification Engineer

Role Summary

Pre-silicon verification engineer responsible for functional verification of DDR PHY IP used in SoCs. Deliver verification plans, testbench architecture, automated validation, and debug from IP through subsystem and SoC levels.

Work with digital and analog architects, RTL and physical-design teams to validate functionality, performance, and power goals and to maintain verification infrastructure and methodology.

Experience Level

Mid-level (Experienced Hire). Guidance from posting: 5–10 years of relevant industry experience.

Responsibilities

Primary responsibilities for this role include:

• Create verification test plans and define testbench architecture for IP-level verification.
• Develop and maintain testbenches and scripted validation flows; automate repetitive validation tasks.
• Execute verification campaigns, analyze results, and perform waveform-level debug to closure.
• Validate design and micro-architectural implementations across IP, subsystem, and SoC levels.
• Develop validation strategies, scope work, and drive execution for pre-silicon validation areas.
• Run and interpret functional and code coverage, VCS NLP and non-NLP simulations, and gate-level simulation (GLS).
• Drive technical reviews of verification plans and proofs with design and architecture teams.
• Maintain and improve verification infrastructure and methodologies; remove roadblocks and mentor team members.

Requirements

Must-have technical skills and experience:

• Proven experience in design verification and verification flow (testbench architecture to verification closure).
• Strong SystemVerilog skills and experience with OVM/UVM methodologies.
• Experience with waveform debug, functional coverage and code coverage analysis.
• Familiarity with VCS simulations (NLP and non-NLP) and gate-level simulation (GLS).
• Excellent debugging, problem solving, verbal and written communication skills; able to work with cross-geo teams.

Nice-to-have / preferred:

• Knowledge of DDR PHY validation and DFx features.
• Scripting skills (Python or Perl) to automate validation tasks.
• Experience with Git/version control and development tools (e.g., VS Code, GitHub); exposure to AI tools like GitHub Copilot is a plus.

Education Requirements

Requires a BS or MS degree (Bachelor's or Master's). The posting indicates 5–10 years of relevant industry experience.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.