Mixed-Signal Integrated Circuit Design Engineer — Power Electronics

Job Title

Mixed-Signal Integrated Circuit Design Engineer — Power Electronics

Role Summary

Design analog and mixed-signal integrated circuits for high-voltage and BCD CMOS processes (up to ~200 V) used in automated biological synthesis systems. Work on circuit architecture, detailed analog/mixed-signal design, and silicon validation in collaboration with electrochemistry and microfluidics teams.

Experience Level

Mid-level (minimum 5+ years of relevant IC design experience).

Responsibilities

Primary responsibilities include the design, verification, and silicon validation of HV-capable analog and mixed-signal circuits.

• Define system-level analog/mixed-signal requirements with a multidisciplinary team.
• Architect and design circuits operating across low-voltage and high-voltage domains.
• Select optimal technology node for application (BCD, HV CMOS, SOI, power IC processes).
• Design HV drivers, level shifters, isolation circuits, bias/reference circuits, sensing, protection, and reliability structures.
• Perform schematic design, simulation, and post-layout verification.
• Collaborate with layout to implement HV-safe structures and meet LVS/DRC/PEX requirements.
• Evaluate device stress, safe operating area (SOA), lifetime reliability, and implement risk mitigation.
• Support silicon bring-up, characterization, debugging, and failure analysis.

Requirements

Must-have technical skills and experience for immediate contribution.

• Minimum 5+ years of relevant IC design experience, preferably in life sciences, synthetic biology, or biopharma environments.
• Direct experience designing and taking to production circuits in high-voltage IC technologies (BCD, HV CMOS, SOI, or power IC processes).
• Transistor-level analog design experience: current/voltage bias, bandgap/reference, amplifiers, LDOs, DAC/ADC, and level shifters.
• Experience with Cadence Virtuoso and Spectre or comparable simulation tools for noise, mismatch, Monte Carlo, and pre/post-layout extraction.
• Layout design, physical verification (LVS, DRC) and PEX experience; collaboration with layout for HV safety.
• Understanding of ESD, latch-up, device stress, and reliability engineering for high-voltage designs.
• Ownership of silicon bring-up, characterization, debugging, and participation in failure analysis.
• Strong communication and collaboration skills; ability to work in a fast-paced startup environment.
• Nice-to-have: Verilog-A modeling and analog-mixed-signal (AMS) simulations.

Education Requirements

PhD in Electrical Engineering or related discipline, or MS with significant relevant experience, or BS with significant relevant experience. The posting specifies: PhD in EE (or related), OR MS with ~5 years of experience, OR BS with ~5 years of experience. Fields referenced: Electrical/Electronic Engineering or related technical disciplines.

About the Company

Company: Beacon Industries

Technology/engineering company focused on analog and mixed-signal integrated circuit design and custom IC layout (SerDes, SRAM, high-speed interfaces), using Synopsys/Cadence EDA tools for design, simulation, verification, and silicon validation.