Mixed Signal Design Verification Engineer
Intel CorporationJob Title
Mixed Signal Design Verification Engineer
Role Summary
Work on functional verification of mixed-signal IPs (for example PCIe, UCIE, USB4/Type-C PHYs) to validate performance, reliability, and compliance with microarchitecture specifications. Collaborate with digital and analog architects, RTL developers, and physical design teams to drive verification, debug issues, and improve verification infrastructure.
Experience Level
Mid-level. Typical experience expectation: 3+ years with a Master's degree or 4+ years with a Bachelor's degree in a relevant engineering discipline.
Responsibilities
Primary verification and validation duties for mixed-signal IP and subsystem functionality.
- Perform functional verification of mixed-signal logic and analog behavioral models to meet design specifications.
- Develop IP verification plans, testbenches, and simulation environments to achieve thorough coverage.
- Define and execute simulation scenarios to verify performance, analyze power/timing, and identify design bugs.
- Conduct root cause analysis on failing pre-silicon tests and implement corrective measures.
- Lead technical reviews of test plans and validation proofs with design and architecture teams.
- Collaborate with cross-functional teams to refine architectural and microarchitectural features.
- Maintain and improve verification methodologies, infrastructure, and tools.
Requirements
Must-have technical skills and experience required to perform the role.
- 3+ years (Master's) or 4+ years (Bachelor's) experience in ASIC/IP verification, subsystem and functional coverage.
- Hands-on experience with SystemVerilog, UVM, and Verilog for IP verification.
- Experience with industry EDA simulators (for example Synopsys VCS, Cadence Xcelium, Mentor Questa).
- Scripting proficiency in Python, Perl, or Tcl for testbench automation.
- Familiarity with standard protocols such as JTAG, IJTAG, CRI, and APB; experience with multi-clock-domain mixed-signal designs.
- Expertise in constraint-random test generation, root-cause analysis, and debugging complex mixed-signal designs.
Nice-to-have:
- Experience with low-power design techniques (UPF, clock gating).
- Familiarity with formal property verification tools and version control systems (Git, Perforce).
- Strong collaboration and communication skills in multi-disciplinary teams.
Education Requirements
Bachelor's or Master's degree in Electronics & Communication, Electrical Engineering, VLSI Engineering, or a related technical field. The posting specifies 4+ years' experience with a Bachelor's degree or 3+ years with a Master's degree.
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
