Mixed Signal Design Verification Engineer

Job Title

Mixed Signal Design Verification Engineer

Role Summary

Perform functional verification of mixed-signal logic and analog-behavioral models to ensure IP meets specification, performance, and power goals.

Work on verification planning, testbench and environment development, simulation and presilicon debug while collaborating with digital, analog, RTL, and physical design teams. This role is eligible for a hybrid work model.

Experience Level

Mid-level (typical experience: 4–10 years industry experience).

Responsibilities

Key responsibilities include:

• Develop verification plans, testbenches, and verification environments for mixed-signal IP.
• Create and run system simulation models to verify functionality, analyze power and timing, and validate microarchitecture behavior.
• Execute coverage-driven verification, track closure, and report verification status.
• Replicate failures, perform root-cause analysis, and debug issues in the presilicon environment.
• Collaborate with architects, RTL developers, analog designers, and physical design teams to resolve issues and improve verification strategies.
• Document test plans and lead technical reviews with design and architecture stakeholders.
• Maintain and improve functional verification infrastructure and methodology.

Requirements

Must-have technical skills and experience:

• Proven experience verifying mixed-signal IP designs and ownership of validation flow from testbench architecture to verification closure.
• Strong knowledge of SystemVerilog and UVM; experience with functional- and coverage-driven verification.
• Experience with VCS simulations (NLP and non-NLP), GLS, functional coverage and code coverage practices.
• Expertise in constraint-random test generation, failure root-cause analysis, and debugging complex mixed-signal designs.
• Strong verbal and written communication skills and ability to work across distributed teams.
• Excellent debug and problem-solving skills; able to multitask in a dynamic environment.

Nice-to-have:

• Experience with UCIe PHY or other high-speed PHY IO mixed-signal IP validation.
• Exposure to formal property verification tools and emulation platforms.
• Scripting experience (Python/Perl) and familiarity with Git and modern editor/AI tools (e.g., VS Code, GitHub Copilot).

Education Requirements

Bachelor's or Master's degree in Electronics, VLSI Engineering, or a related field is required (as stated in the source).

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.