Mixed Signal Design Verification Engineer

Job Title

Mixed Signal Design Verification Engineer

Role Summary

Responsible for functional verification of mixed-signal IPs (examples: PCIe, UCIE, USB4/Type-C PHYs) to ensure design correctness, performance, and reliability. Work with cross-functional teams including analog and digital architects, RTL developers, and physical design groups to validate and optimize mixed-signal microarchitectures.

Experience Level

Mid-level. Typical experience: 3–4+ years in ASIC or IP verification (see Education Requirements for degree-related experience guidance).

Responsibilities

Primary verification responsibilities and day-to-day activities:

• Perform functional verification of mixed-signal logic and analog behavioral models to validate design against specifications.
• Develop IP verification plans, testbenches, and verification environments to achieve comprehensive coverage.
• Define and run simulations to verify performance, analyze power and timing, and identify design issues.
• Perform root-cause analysis and implement corrective actions for failing pre-silicon tests.
• Collaborate with architects, RTL developers, and physical design teams to refine architectures and microarchitecture features.
• Lead technical reviews of test plans and validation artifacts and document results and findings.
• Maintain and improve verification methodologies, infrastructure, and tooling.

Requirements

Must-have technical skills and experience. Education specifics are listed separately in Education Requirements.

• 3–4+ years of professional experience in ASIC/IP verification, subsystem and functional coverage for mixed-signal designs.
• Proficient in SystemVerilog, UVM, and Verilog for IP verification.
• Hands-on experience with simulation/verification EDA tools such as Synopsys VCS, Cadence Xcelium, or Mentor Questa.
• Strong scripting skills in Python, Perl, or Tcl for testbench automation.
• Familiarity with protocols and interfaces (JTAG, IJTAG, CRI, APB) and multi-clock-domain mixed-signal designs.
• Experience with constraint-random test generation, debugging, and root-cause analysis of complex mixed-signal designs.
• Nice-to-have: low-power design techniques (UPF, clock gating), formal property verification tools, and experience with version control systems (Git or Perforce).
• Good communication and cross-functional collaboration skills.

Education Requirements

Bachelor's or Master's degree in Electronics & Communication, Electrical Engineering, VLSI Engineering, or a related technical field. The posting specifies 4+ years of experience with a Bachelor's degree or 3+ years with a Master's degree in relevant domains.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.