Microarchitect and RTL Designer - Compute
MatXJob Title
Microarchitect and RTL Designer - Compute
Role Summary
Design and deliver micro-architecture and RTL for compute subsystems used in ML acceleration. You will own block- or subsystem-level architecture and RTL from specification through sign-off, working with verification, DFT, and physical design partners to meet performance, power, area, and tapeout milestones.
Experience Level
Mid-level - at least 5 years of silicon design experience.
Responsibilities
The role focuses on end-to-end micro-architecture and RTL delivery for compute blocks and subsystems.
- Define and implement micro-architecture and RTL for compute blocks and subsystems.
- Drive architecture and design reviews, and coordinate sign-off activities toward design freeze and tapeout.
- Collaborate with verification, DFT, and physical design teams to close functional, timing, area, and power targets.
- Contribute to scalable architecture-to-design methodologies across blocks and full-chip flows.
- Optimize implementations for performance-power-area tradeoffs and integration into the overall chip design.
Requirements
Core qualifications and practical skills required for successful performance in this role.
- At least 5 years of silicon design experience with proven production results.
- Demonstrated tape-out experience with end-to-end ownership of chip designs.
- Production-proven micro-architecture and design experience for high-performance compute, connectivity, memory management, or related subsystems.
- Experience with RTL and design languages and flows (SystemVerilog, synthesis, lint) and familiarity with sign-off procedures.
- Practical experience with verification collaboration and testing toward performance and coverage goals.
- Proficiency in scripting/programming used in chip flows (Python, C/C++ or similar).
- Ability and willingness to ramp on Bluespec; ability to learn functionally-rooted HDLs and related design paradigms.
Nice-to-have:
- Prior Bluespec or functional-programming familiarity (Haskell-like paradigms).
- Experience designing arithmetic/compute datapaths for ML (matmul/systolic arrays, reduction trees, floating-point or special-function units).
- Extensive experience with data-movement logic such as caches, buffers, crossbars, and related datapaths.
- Familiarity with emulation platforms and advanced verification methodologies.
Education Requirements
Not specified.
About the Company
Company: MatX
Headquarters: Mountain View, California, USA
MatX specializes in creating faster chips for large language models (LLMs), focusing on innovative hardware and software solutions. The company fosters a collaborative and supportive work environment, welcoming candidates of all experience levels. Their approach prioritizes deep understanding and consideration of novel methods to drive efficiency and performance in their projects, particularly in silicon design and related engineering roles.
