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Lead Engineer – RTL Design (Wireless Modem IP)

Silicon Labs
October 23, 2026
Full-time
On-site
Hyderabad, Telangana, India
RTL Design Jobs, Level - Senior

Job Title

Lead Engineer – RTL Design (Wireless Modem IP)

Role Summary

Design and deliver high-performance, power-efficient synthesizable RTL for wireless modem digital baseband and PHY-layer signal-processing IP. Work on microarchitecture, implementation, verification, and PPA optimization for modem components used in Wi‑Fi and low-power IoT SoCs.

Collaborate with modem system engineers, verification, analog, and SoC teams to ensure integration and delivery of robust modem IP.

Experience Level

Senior - typically 7–15 years of experience in digital RTL design, preferably with wireless modem baseband or PHY-layer signal processing.

Responsibilities

Primary responsibilities include developing RTL, owning modules through integration, and ensuring design quality.

  • Design and implement synthesizable RTL for digital baseband and PHY signal-processing blocks.
  • Define microarchitecture and implement DSP modules (FIR filters, correlators, FFTs, FEC decoders, etc.).
  • Optimize RTL for power, performance, and area (PPA).
  • Develop module- and subsystem-level testbenches and execute verification plans.
  • Participate in design reviews, document IP functionality and timing interfaces.
  • Perform design quality checks (Lint, CDC, RDC) and prepare designs for synthesis.
  • Collaborate with verification, systems, analog, and SoC teams to support integration and debug.
  • Drive delivery and design quality of modem IPs across the development lifecycle.

Requirements

Must-have technical skills and experience to perform the role.

  • 7–15 years of experience in digital RTL design with strong RTL delivery history.
  • Proven expertise in Verilog/SystemVerilog, digital microarchitecture, and synthesis-ready RTL coding.
  • Hands-on experience implementing DSP blocks (FIR, FFT, correlators, FEC) in RTL.
  • Experience optimizing RTL for PPA and performing synthesis-driven adjustments.
  • Experience with module- and subsystem-level verification, testbench development, and debugging to achieve functional coverage.
  • Familiarity with design-quality checks and tools (Lint, CDC, RDC) and synthesis readiness tasks.
  • Strong problem-solving, debugging, and cross-functional collaboration skills.

Nice-to-have:

  • Experience with IEEE 802.11 Wi‑Fi, 4G/5G, or other OFDM-based systems.
  • Low-power RTL design techniques and power-optimization experience.
  • Experience integrating digital IP into wireless SoCs and ownership of end-to-end IP delivery.
  • Familiarity with AI-powered productivity or analysis tools applied to design/verification.

Education Requirements

Bachelor's or Master’s degree in Electrical Engineering, Electronics, Communication Engineering, Computer Engineering, or a closely related technical field - or equivalent practical experience.


About the Company

Company: Silicon Labs

Headquarters: Austin, Texas, USA

Silicon Labs is a leading innovator in low-power wireless connectivity, creating embedded technology that connects devices to improve lives. With a focus on advanced edge connectivity applications, the company provides device makers with cutting-edge solutions and support. Headquartered in Austin, Texas, Silicon Labs operates in over 16 countries, serving markets such as smart home, industrial IoT, and smart cities.

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Date Posted: 2026-10-23